From: Yangbo Lu <yangbo.lu@nxp.com>
Date: Wed, 20 Nov 2019 16:23:17 +0800
Subject: net: dsa: ocelot: define PTP registers for felix_vsc9959
Git-commit: 5df66c48bc4e4019f92a8c62d0b74a97d102ba8d
Patch-mainline: v5.5-rc1
References: jsc#SLE-9263
This patch is to define PTP registers for felix_vsc9959.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
---
drivers/net/dsa/ocelot/felix_vsc9959.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/net/dsa/ocelot/felix_vsc9959.c b/drivers/net/dsa/ocelot/felix_vsc9959.c
index d67bd14a48e0..b9758b0d18c7 100644
--- a/drivers/net/dsa/ocelot/felix_vsc9959.c
+++ b/drivers/net/dsa/ocelot/felix_vsc9959.c
@@ -282,6 +282,16 @@ static const u32 vsc9959_sys_regmap[] = {
REG_RESERVED(SYS_CM_DATA),
};
+static const u32 vsc9959_ptp_regmap[] = {
+ REG(PTP_PIN_CFG, 0x000000),
+ REG(PTP_PIN_TOD_SEC_MSB, 0x000004),
+ REG(PTP_PIN_TOD_SEC_LSB, 0x000008),
+ REG(PTP_PIN_TOD_NSEC, 0x00000c),
+ REG(PTP_CFG_MISC, 0x0000a0),
+ REG(PTP_CLK_CFG_ADJ_CFG, 0x0000a4),
+ REG(PTP_CLK_CFG_ADJ_FREQ, 0x0000a8),
+};
+
static const u32 vsc9959_gcb_regmap[] = {
REG(GCB_SOFT_RST, 0x000004),
};
@@ -293,6 +303,7 @@ static const u32 *vsc9959_regmap[] = {
[REW] = vsc9959_rew_regmap,
[SYS] = vsc9959_sys_regmap,
[S2] = vsc9959_s2_regmap,
+ [PTP] = vsc9959_ptp_regmap,
[GCB] = vsc9959_gcb_regmap,
};
@@ -330,6 +341,11 @@ static struct resource vsc9959_target_io_res[] = {
.end = 0x00603ff,
.name = "s2",
},
+ [PTP] = {
+ .start = 0x0090000,
+ .end = 0x00900cb,
+ .name = "ptp",
+ },
[GCB] = {
.start = 0x0070000,
.end = 0x00701ff,
--
2.16.4