From: Marc Kleine-Budde <mkl@pengutronix.de>
Date: Sun, 14 Jun 2020 21:10:38 +0200
Subject: dt-bindings: can: flexcan: remove ack_grp and ack_bit from
fsl,stop-mode
Git-commit: e4245bbca91da17c7e8c026d2aecf10687519a2b
Patch-mainline: v5.10-rc1
References: jsc#SLE-12251
Since commit:
048e3a34a2e7 can: flexcan: poll MCR_LPM_ACK instead of GPR ACK for stop mode acknowledgment
the driver polls the IP core's internal bit MCR[LPM_ACK] as stop mode
acknowledge and not the acknowledgment on chip level.
This means the 4th and 5th value of the property "fsl,stop-mode" isn't used
anymore. It will be removed from the driver in the next patch, so remove it
from the binding documentation.
Link: http://lore.kernel.org/r/20201006203748.1750156-14-mkl@pengutronix.de
Fixes: 048e3a34a2e7 ("can: flexcan: poll MCR_LPM_ACK instead of GPR ACK for stop mode acknowledgment")
Cc: devicetree <devicetree@vger.kernel.org>
Cc: Joakim Zhang <qiangqing.zhang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
---
Documentation/devicetree/bindings/net/can/fsl-flexcan.txt | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
index c6152dc2d2d0..e10b6eb955e1 100644
--- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
+++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
@@ -31,12 +31,10 @@ Optional properties:
endian.
- fsl,stop-mode: register bits of stop mode control, the format is
- <&gpr req_gpr req_bit ack_gpr ack_bit>.
+ <&gpr req_gpr req_bit>.
gpr is the phandle to general purpose register node.
req_gpr is the gpr register offset of CAN stop request.
req_bit is the bit offset of CAN stop request.
- ack_gpr is the gpr register offset of CAN stop acknowledge.
- ack_bit is the bit offset of CAN stop acknowledge.
- fsl,clk-source: Select the clock source to the CAN Protocol Engine (PE).
It's SoC Implementation dependent. Refer to RM for detailed
--
2.26.2