From 4008a9d58df771f3937fedffb5724592202556da Mon Sep 17 00:00:00 2001
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Date: Thu, 30 Sep 2021 17:00:00 +0300
Subject: drm/msm/dpu: don't cache pipe->cap->features in dpu_plane
Git-commit: 701a21ec02e40e69357214a61fb9fb52dad58ad1
Patch-mainline: v5.17-rc1
References: jsc#PED-1166 jsc#PED-1168 jsc#PED-1170 jsc#PED-1218 jsc#PED-1220 jsc#PED-1222 jsc#PED-1223 jsc#PED-1225
Do not cache hw_pipe's features in dpu_plane. Use
pdpu->pipe_hw->cap->features directly.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Link: https://lore.kernel.org/r/20210930140002.308628-10-dmitry.baryshkov@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Patrik Jakobsson <pjakobsson@suse.de>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
index 6c3ad1b50d7e..77c318ef4fe7 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
@@ -100,7 +100,6 @@ struct dpu_plane {
struct mutex lock;
enum dpu_sspp pipe;
- uint32_t features; /* capabilities from catalog */
struct dpu_hw_pipe *pipe_hw;
uint32_t color_fill;
@@ -646,7 +645,7 @@ static const struct dpu_csc_cfg *_dpu_plane_get_csc(struct dpu_plane *pdpu, cons
if (!DPU_FORMAT_IS_YUV(fmt))
return NULL;
- if (BIT(DPU_SSPP_CSC_10BIT) & pdpu->features)
+ if (BIT(DPU_SSPP_CSC_10BIT) & pdpu->pipe_hw->cap->features)
csc_ptr = &dpu_csc10_YUV2RGB_601L;
else
csc_ptr = &dpu_csc_YUV2RGB_601L;
@@ -1003,8 +1002,8 @@ static int dpu_plane_atomic_check(struct drm_plane *plane,
min_src_size = DPU_FORMAT_IS_YUV(fmt) ? 2 : 1;
if (DPU_FORMAT_IS_YUV(fmt) &&
- (!(pdpu->features & DPU_SSPP_SCALER) ||
- !(pdpu->features & (BIT(DPU_SSPP_CSC)
+ (!(pdpu->pipe_hw->cap->features & DPU_SSPP_SCALER) ||
+ !(pdpu->pipe_hw->cap->features & (BIT(DPU_SSPP_CSC)
| BIT(DPU_SSPP_CSC_10BIT))))) {
DPU_DEBUG_PLANE(pdpu,
"plane doesn't have scaler/csc for yuv\n");
@@ -1446,8 +1445,8 @@ static int _dpu_plane_init_debugfs(struct drm_plane *plane)
plane->dev->primary->debugfs_root);
/* don't error check these */
- debugfs_create_x32("features", 0600,
- pdpu->debugfs_root, &pdpu->features);
+ debugfs_create_xul("features", 0600,
+ pdpu->debugfs_root, (unsigned long *)&pdpu->pipe_hw->cap->features);
/* add register dump support */
dpu_debugfs_setup_regset32(&pdpu->debugfs_src,
@@ -1620,7 +1619,6 @@ struct drm_plane *dpu_plane_init(struct drm_device *dev,
}
/* cache features mask for later */
- pdpu->features = pdpu->pipe_hw->cap->features;
pdpu->pipe_sblk = pdpu->pipe_hw->cap->sblk;
if (!pdpu->pipe_sblk) {
DPU_ERROR("[%u]invalid sblk\n", pipe);
--
2.38.1