From 2eb4497d1c98b46181f0954ead41c1d54247db6b Mon Sep 17 00:00:00 2001
From: Ian Chen <ian.chen@amd.com>
Date: Thu, 24 Jun 2021 10:48:43 +0800
Subject: drm/amd/display: Extend dmub_cmd_psr_copy_settings_data struct
Git-commit: 360d1b65449356f56287e49d1b3d7579e758ca29
Patch-mainline: v5.15-rc1
References: jsc#PED-1166 jsc#PED-1168 jsc#PED-1170 jsc#PED-1218 jsc#PED-1220 jsc#PED-1222 jsc#PED-1223 jsc#PED-1225
Reserve padding bytes for new feature implementation
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Ian Chen <ian.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Patrik Jakobsson <pjakobsson@suse.de>
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index b73d83c0df7b..52677c9bda9a 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -1414,6 +1414,10 @@ struct dmub_cmd_psr_copy_settings_data {
* Currently the support is only for 0 or 1
*/
uint8_t panel_inst;
+ /**
+ * Explicit padding to 4 byte boundary.
+ */
+ uint8_t pad3[4];
};
/**
--
2.38.1