From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Date: Thu, 13 Feb 2020 12:06:39 +0800
Subject: PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors
Git-commit: 029dea3cdc67690736e35b78c9d8ed6da1c9ec98
Patch-mainline: v5.7-rc1
References: bsc#1161495
There are some 8-bit and 16-bit registers in PCIe configuration
space, so add these accessors accordingly.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Reviewed-by: Andrew Murray <amurray@thegoodpenguin.co.uk>
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
---
.../pci/controller/mobiveil/pcie-mobiveil.h | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil.h b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
index f395fa661a1c..ac76cf5d1007 100644
--- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h
+++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h
@@ -182,10 +182,33 @@ static inline u32 mobiveil_csr_readl(struct mobiveil_pcie *pcie, u32 off)
return mobiveil_csr_read(pcie, off, 0x4);
}
+static inline u16 mobiveil_csr_readw(struct mobiveil_pcie *pcie, u32 off)
+{
+ return mobiveil_csr_read(pcie, off, 0x2);
+}
+
+static inline u8 mobiveil_csr_readb(struct mobiveil_pcie *pcie, u32 off)
+{
+ return mobiveil_csr_read(pcie, off, 0x1);
+}
+
+
static inline void mobiveil_csr_writel(struct mobiveil_pcie *pcie, u32 val,
u32 off)
{
mobiveil_csr_write(pcie, val, off, 0x4);
}
+static inline void mobiveil_csr_writew(struct mobiveil_pcie *pcie, u16 val,
+ u32 off)
+{
+ mobiveil_csr_write(pcie, val, off, 0x2);
+}
+
+static inline void mobiveil_csr_writeb(struct mobiveil_pcie *pcie, u8 val,
+ u32 off)
+{
+ mobiveil_csr_write(pcie, val, off, 0x1);
+}
+
#endif /* _PCIE_MOBIVEIL_H */
--
2.26.2