Blob Blame History Raw
From 555ae26d51854503a80e77a781e25e32fcdc5c7c Mon Sep 17 00:00:00 2001
From: Animesh Manna <animesh.manna@intel.com>
Date: Wed, 1 Sep 2021 21:34:02 +0530
Subject: drm/i915/dp: fix for ADL_P/S dp/edp max source rates
Git-commit: 555ae26d51854503a80e77a781e25e32fcdc5c7c
Patch-mainline: v5.16-rc1
References: jsc#SLE-22724

Added HBR3 support for ADL_P and ADL_S platform.

Bspec: 53597, 53720, 49185, 55409

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210901160402.24816-6-animesh.manna@intel.com
Signed-off-by: Patrik Jakobsson <pjakobsson@suse.de>
---
 drivers/gpu/drm/i915/display/intel_dp.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -304,7 +304,8 @@ intel_dp_set_source_rates(struct intel_d
 		size = ARRAY_SIZE(icl_rates);
 		if (IS_JSL_EHL(dev_priv))
 			max_rate = ehl_max_source_rate(intel_dp);
-		else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
+		else if (IS_ALDERLAKE_P(dev_priv) || IS_ALDERLAKE_S(dev_priv) ||
+			 IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
 			max_rate = dg1_max_source_rate(intel_dp);
 		else
 			max_rate = icl_max_source_rate(intel_dp);