From: Maxim Mikityanskiy <maximmi@nvidia.com>
Date: Tue, 6 Apr 2021 09:40:07 +0300
Subject: net/mlx5e: Use mlx5e_rqt_get_rqtn to access RQT hardware id
Patch-mainline: v5.15-rc1
Git-commit: 093d4bc1731dfe4ec209d3534608a38436331586
References: jsc#SLE-19253

In order to abstract from implementation details of mlx5e_rqt, use the
mlx5e_rqt_get_rqtn getter instead of accessing the field directly.

Signed-off-by: Maxim Mikityanskiy <maximmi@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
---
 drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c |    2 +-
 drivers/net/ethernet/mellanox/mlx5/core/en_main.c          |   10 +++++++---
 drivers/net/ethernet/mellanox/mlx5/core/en_tc.c            |    2 +-
 3 files changed, 9 insertions(+), 5 deletions(-)

--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c
@@ -635,7 +635,7 @@ int mlx5e_ktls_add_rx(struct net_device
 	priv_rx->sw_stats = &priv->tls->sw_stats;
 	mlx5e_set_ktls_rx_priv_ctx(tls_ctx, priv_rx);
 
-	rqtn = priv->rx_res->channels[rxq].direct_rqt.rqtn;
+	rqtn = mlx5e_rqt_get_rqtn(&priv->rx_res->channels[rxq].direct_rqt);
 
 	err = mlx5e_ktls_create_tir(mdev, &priv_rx->tirn, rqtn);
 	if (err)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
@@ -3134,7 +3134,9 @@ static void mlx5e_build_indir_tir_ctx(st
 				      enum mlx5e_traffic_types tt,
 				      u32 *tirc)
 {
-	mlx5e_build_indir_tir_ctx_common(priv, priv->rx_res->indir_rqt.rqtn, tirc);
+	u32 rqtn = mlx5e_rqt_get_rqtn(&priv->rx_res->indir_rqt);
+
+	mlx5e_build_indir_tir_ctx_common(priv, rqtn, tirc);
 	mlx5e_build_indir_tir_ctx_hash(&priv->rx_res->rss_params,
 				       &tirc_default_config[tt], tirc, false);
 }
@@ -3149,7 +3151,9 @@ static void mlx5e_build_inner_indir_tir_
 					    enum mlx5e_traffic_types tt,
 					    u32 *tirc)
 {
-	mlx5e_build_indir_tir_ctx_common(priv, priv->rx_res->indir_rqt.rqtn, tirc);
+	u32 rqtn = mlx5e_rqt_get_rqtn(&priv->rx_res->indir_rqt);
+
+	mlx5e_build_indir_tir_ctx_common(priv, rqtn, tirc);
 	mlx5e_build_indir_tir_ctx_hash(&priv->rx_res->rss_params,
 				       &tirc_default_config[tt], tirc, true);
 }
@@ -3228,7 +3232,7 @@ static int mlx5e_create_direct_tir(struc
 		return -ENOMEM;
 
 	tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
-	mlx5e_build_direct_tir_ctx(priv, rqt->rqtn, tirc);
+	mlx5e_build_direct_tir_ctx(priv, mlx5e_rqt_get_rqtn(rqt), tirc);
 	err = mlx5e_create_tir(priv->mdev, tir, in);
 	if (unlikely(err))
 		mlx5_core_warn(priv->mdev, "create tirs failed, %d\n", err);
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
@@ -548,7 +548,7 @@ static int mlx5e_hairpin_create_indirect
 
 		MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
 		MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
-		MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
+		MLX5_SET(tirc, tirc, indirect_table, mlx5e_rqt_get_rqtn(&hp->indir_rqt));
 		mlx5e_build_indir_tir_ctx_hash(&priv->rx_res->rss_params, &ttconfig,
 					       tirc, false);