From: Hans de Goede <hdegoede@redhat.com>
Date: Tue, 6 Jul 2021 18:09:22 +0200
Subject: ACPI / PMIC: XPower: optimize I2C-bus accesses
Patch-mainline: v5.15-rc1
Git-commit: e38ba404f20c4beb1a5d4547567d2934a5b95843
References: jsc#SLE-19223
The I2C-bus to the XPower AXP288 is shared between the Linux kernel and
the SoCs P-Unit. The P-Unit has a semaphore which the kernel must "lock"
before it may use the bus and while the kernel holds the semaphore the CPU
and GPU power-states must not be changed otherwise the system will freeze.
This is a complex process, which is quite expensive. This is all done by
iosf_mbi_block_punit_i2c_access(). To ensure that no unguarded I2C-bus
accesses happen, iosf_mbi_block_punit_i2c_access() gets called by the
I2C-bus-driver for every I2C transfer. Because this is so expensive it
is allowed to call iosf_mbi_block_punit_i2c_access() in a nested
fashion, so that higher-level code which does multiple I2C-transfers can
call it once for a group of transfers, turning the calls done by the
I2C-bus-driver into no-ops.
Add iosf_mbi_block_punit_i2c_access() calls around groups of register
accesses, so that the P-Unit semaphore only needs to be taken once
for each group of register accesses.
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Lee, Chun-Yi <jlee@suse.com>
---
drivers/acpi/pmic/intel_pmic_xpower.c | 23 ++++++++++++++++++-----
1 file changed, 18 insertions(+), 5 deletions(-)
--- a/drivers/acpi/pmic/intel_pmic_xpower.c
+++ b/drivers/acpi/pmic/intel_pmic_xpower.c
@@ -178,15 +178,17 @@ static int intel_xpower_pmic_update_powe
{
int data, ret;
- /* GPIO1 LDO regulator needs special handling */
- if (reg == XPOWER_GPI1_CTRL)
- return regmap_update_bits(regmap, reg, GPI1_LDO_MASK,
- on ? GPI1_LDO_ON : GPI1_LDO_OFF);
-
ret = iosf_mbi_block_punit_i2c_access();
if (ret)
return ret;
+ /* GPIO1 LDO regulator needs special handling */
+ if (reg == XPOWER_GPI1_CTRL) {
+ ret = regmap_update_bits(regmap, reg, GPI1_LDO_MASK,
+ on ? GPI1_LDO_ON : GPI1_LDO_OFF);
+ goto out;
+ }
+
if (regmap_read(regmap, reg, &data)) {
ret = -EIO;
goto out;
@@ -234,6 +236,11 @@ static int intel_xpower_pmic_get_raw_tem
return ret;
if (adc_ts_pin_ctrl & AXP288_ADC_TS_CURRENT_ON_OFF_MASK) {
+ /*
+ * AXP288_ADC_TS_PIN_CTRL reads are cached by the regmap, so
+ * this does to a single I2C-transfer, and thus there is no
+ * need to explicitly call iosf_mbi_block_punit_i2c_access().
+ */
ret = regmap_update_bits(regmap, AXP288_ADC_TS_PIN_CTRL,
AXP288_ADC_TS_CURRENT_ON_OFF_MASK,
AXP288_ADC_TS_CURRENT_ON_ONDEMAND);
@@ -244,6 +251,10 @@ static int intel_xpower_pmic_get_raw_tem
usleep_range(6000, 10000);
}
+ ret = iosf_mbi_block_punit_i2c_access();
+ if (ret)
+ return ret;
+
ret = regmap_bulk_read(regmap, AXP288_GP_ADC_H, buf, 2);
if (ret == 0)
ret = (buf[0] << 4) + ((buf[1] >> 4) & 0x0f);
@@ -254,6 +265,8 @@ static int intel_xpower_pmic_get_raw_tem
AXP288_ADC_TS_CURRENT_ON);
}
+ iosf_mbi_unblock_punit_i2c_access();
+
return ret;
}