From 7466d8c03f10b617794472e2030456c9a0877e93 Mon Sep 17 00:00:00 2001
From: Boyuan Zhang <boyuan.zhang@amd.com>
Date: Wed, 1 Jul 2020 17:57:47 -0400
Subject: drm/amdgpu: enable VCN3.0 PG and CG for navy_flounder
Git-commit: ebb06097ee29442461f9b3bcd745d85e6fa9996b
Patch-mainline: v5.9-rc1
References: jsc#SLE-12680, jsc#SLE-12880, jsc#SLE-12882, jsc#SLE-12883, jsc#SLE-13496, jsc#SLE-15322
Enable VCN3.0 PG and CG for navy_flounder by setting up the flags to the ASIC
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Patrik Jakobsson <pjakobsson@suse.de>
---
drivers/gpu/drm/amd/amdgpu/nv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 5e03e3c59aae..13efe87c7a75 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -775,8 +775,8 @@ static int nv_common_early_init(void *handle)
adev->external_rev_id = adev->rev_id + 0x28;
break;
case CHIP_NAVY_FLOUNDER:
- adev->cg_flags = 0;
- adev->pg_flags = 0;
+ adev->cg_flags = AMD_CG_SUPPORT_VCN_MGCG;
+ adev->pg_flags = AMD_PG_SUPPORT_VCN;
adev->external_rev_id = adev->rev_id + 0x32;
break;
--
2.29.2