From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Date: Mon, 27 Dec 2021 19:00:26 +0100
Subject: ARM: dts: meson8b: Fix the UART device-tree schema validation
Git-commit: 3375aa77135f6aeb1107ed839a2050a4118444bc
Patch-mainline: v5.17-rc4
References: git-fixes
The dt-bindings for the UART controller only allow the following values
for Meson8 SoCs:
- "amlogic,meson8b-uart", "amlogic,meson-ao-uart"
- "amlogic,meson8b-uart"
Use the correct fallback compatible string "amlogic,meson-ao-uart" for
AO UART. Drop the "amlogic,meson-uart" compatible string from the EE
domain UART controllers.
Also update the order of the clocks to match the order defined in the
yaml bindings.
Fixes: b02d6e73f5fc96 ("ARM: dts: meson8b: use stable UART bindings with correct gate clock")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20211227180026.4068352-4-martin.blumenstingl@googlemail.com
Acked-by: Ivan T. Ivanov <iivanov@suse.de>
---
arch/arm/boot/dts/meson8b.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -518,25 +518,25 @@
};
&uart_AO {
- compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
+ compatible = "amlogic,meson8b-uart", "amlogic,meson-ao-uart";
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
clock-names = "baud", "xtal", "pclk";
};
&uart_A {
- compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
+ compatible = "amlogic,meson8b-uart";
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>;
clock-names = "baud", "xtal", "pclk";
};
&uart_B {
- compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
+ compatible = "amlogic,meson8b-uart";
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>;
clock-names = "baud", "xtal", "pclk";
};
&uart_C {
- compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
+ compatible = "amlogic,meson8b-uart";
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>;
clock-names = "baud", "xtal", "pclk";
};