From: Gayatri Kammela <gayatri.kammela@intel.com>
Date: Tue, 6 Oct 2020 20:51:05 -0700
Subject: platform/x86: intel_pmc_core: Clean up: Remove the duplicate comments
and reorganize
Git-commit: 3976c6e365d7d50cbc96e92b0c537f5e8c744373
Patch-mainline: v5.11-rc1
References: jsc#SLE-13398 jsc#SLE-13503
Some of the Cannon Lake PCH IPs are reused by most of the platforms
such as Ice Lake, Tiger Lake, Elkhart Lake, Jasper Lake and can be
reused by future platforms as well. The same was mentioned via comments
not once but twice in an array of bit map structs for Cannon Lake
(cnp_pfear_map).
Hence, remove the duplicate comments and reorganize them.
Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David E. Box <david.e.box@intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Rui Zhang <rui.zhang@intel.com>
Suggested-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com>
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com>
Link: https://lore.kernel.org/r/20201007035108.31078-2-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
---
drivers/platform/x86/intel_pmc_core.c | 32 ++++++++++++++++++++------------
1 file changed, 20 insertions(+), 12 deletions(-)
--- a/drivers/platform/x86/intel_pmc_core.c
+++ b/drivers/platform/x86/intel_pmc_core.c
@@ -118,6 +118,10 @@ static const struct pmc_bit_map spt_pfea
};
static const struct pmc_bit_map *ext_spt_pfear_map[] = {
+ /*
+ * Check intel_pmc_core_ids[] users of spt_reg_map for
+ * a list of core SoCs using this.
+ */
spt_pfear_map,
NULL
};
@@ -166,7 +170,6 @@ static const struct pmc_reg_map spt_reg_
/* Cannon Lake: PGD PFET Enable Ack Status Register(s) bitmap */
static const struct pmc_bit_map cnp_pfear_map[] = {
- /* Reserved for Cannon Lake but valid for Comet Lake */
{"PMC", BIT(0)},
{"OPI-DMI", BIT(1)},
{"SPI/eSPI", BIT(2)},
@@ -192,10 +195,6 @@ static const struct pmc_bit_map cnp_pfea
{"SDX", BIT(4)},
{"SPE", BIT(5)},
{"Fuse", BIT(6)},
- /*
- * Reserved for Cannon Lake but valid for Ice Lake, Comet Lake,
- * Tiger Lake, Elkhart Lake and Jasper Lake.
- */
{"SBR8", BIT(7)},
{"CSME_FSC", BIT(0)},
@@ -239,10 +238,6 @@ static const struct pmc_bit_map cnp_pfea
{"HDA_PGD4", BIT(2)},
{"HDA_PGD5", BIT(3)},
{"HDA_PGD6", BIT(4)},
- /*
- * Reserved for Cannon Lake but valid for Ice Lake, Comet Lake,
- * Tiger Lake, ELkhart Lake and Jasper Lake.
- */
{"PSF6", BIT(5)},
{"PSF7", BIT(6)},
{"PSF8", BIT(7)},
@@ -250,12 +245,15 @@ static const struct pmc_bit_map cnp_pfea
};
static const struct pmc_bit_map *ext_cnp_pfear_map[] = {
+ /*
+ * Check intel_pmc_core_ids[] users of cnp_reg_map for
+ * a list of core SoCs using this.
+ */
cnp_pfear_map,
NULL
};
static const struct pmc_bit_map icl_pfear_map[] = {
- /* Ice Lake and Jasper Lake generation onwards only */
{"RES_65", BIT(0)},
{"RES_66", BIT(1)},
{"RES_67", BIT(2)},
@@ -268,13 +266,16 @@ static const struct pmc_bit_map icl_pfea
};
static const struct pmc_bit_map *ext_icl_pfear_map[] = {
+ /*
+ * Check intel_pmc_core_ids[] users of icl_reg_map for
+ * a list of core SoCs using this.
+ */
cnp_pfear_map,
icl_pfear_map,
NULL
};
static const struct pmc_bit_map tgl_pfear_map[] = {
- /* Tiger Lake and Elkhart Lake generation onwards only */
{"PSF9", BIT(0)},
{"RES_66", BIT(1)},
{"RES_67", BIT(2)},
@@ -286,6 +287,10 @@ static const struct pmc_bit_map tgl_pfea
};
static const struct pmc_bit_map *ext_tgl_pfear_map[] = {
+ /*
+ * Check intel_pmc_core_ids[] users of tgl_reg_map for
+ * a list of core SoCs using this.
+ */
cnp_pfear_map,
tgl_pfear_map,
NULL
@@ -369,7 +374,10 @@ static const struct pmc_bit_map cnp_ltr_
{"ISH", CNP_PMC_LTR_ISH},
{"UFSX2", CNP_PMC_LTR_UFSX2},
{"EMMC", CNP_PMC_LTR_EMMC},
- /* Reserved for Cannon Lake but valid for Ice Lake */
+ /*
+ * Check intel_pmc_core_ids[] users of cnp_reg_map for
+ * a list of core SoCs using this.
+ */
{"WIGIG", ICL_PMC_LTR_WIGIG},
/* Below two cannot be used for LTR_IGNORE */
{"CURRENT_PLATFORM", CNP_PMC_LTR_CUR_PLT},