From 3a2911b27ae3e2c4f4dc2e0726a591bad27d303a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
Date: Fri, 13 Mar 2020 18:48:28 +0200
Subject: drm/i915: Fix port sync code to work with >2 pipes
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Git-commit: 4f05d7aeba9764f624e7cb2ebd9a729c8a84408c
Patch-mainline: v5.8-rc1
References: jsc#SLE-12680, jsc#SLE-12880, jsc#SLE-12882, jsc#SLE-12883, jsc#SLE-13496, jsc#SLE-15322
Don't assume there is just one port sync slave. We might have several.
v2: Fix unitialized new_crtc_state usage (José)
Fix clearing of modeset_pipes for slaves
s/oldnew/new/
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200313164831.5980-11-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Patrik Jakobsson <pjakobsson@suse.de>
---
drivers/gpu/drm/i915/display/intel_display.c | 105 ++++++++++---------
1 file changed, 54 insertions(+), 51 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d78b124e4c1c..1a99246c555d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15008,18 +15008,6 @@ static void intel_update_crtc(struct intel_atomic_state *state,
intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
}
-static struct intel_crtc *intel_get_slave_crtc(const struct intel_crtc_state *new_crtc_state)
-{
- struct drm_i915_private *dev_priv = to_i915(new_crtc_state->uapi.crtc->dev);
- enum transcoder slave_transcoder;
-
- drm_WARN_ON(&dev_priv->drm,
- !is_power_of_2(new_crtc_state->sync_mode_slaves_mask));
-
- slave_transcoder = ffs(new_crtc_state->sync_mode_slaves_mask) - 1;
- return intel_get_crtc_for_pipe(dev_priv,
- (enum pipe)slave_transcoder);
-}
static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
struct intel_crtc_state *old_crtc_state,
@@ -15108,8 +15096,8 @@ static void intel_commit_modeset_enables(struct intel_atomic_state *state)
}
}
-static void intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
- struct intel_atomic_state *state)
+static void intel_set_dp_tp_ctl_normal(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
struct drm_connector *uninitialized_var(conn);
struct drm_connector_state *conn_state;
@@ -15124,45 +15112,56 @@ static void intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
intel_dp_stop_link_train(intel_dp);
}
-static void intel_update_trans_port_sync_crtcs(struct intel_crtc *crtc,
- struct intel_atomic_state *state,
- struct intel_crtc_state *old_crtc_state,
- struct intel_crtc_state *new_crtc_state)
+static void intel_update_trans_port_sync_crtcs(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
- struct intel_crtc *slave_crtc = intel_get_slave_crtc(new_crtc_state);
- struct intel_crtc_state *new_slave_crtc_state =
- intel_atomic_get_new_crtc_state(state, slave_crtc);
- struct intel_crtc_state *old_slave_crtc_state =
- intel_atomic_get_old_crtc_state(state, slave_crtc);
+ struct drm_i915_private *i915 = to_i915(state->base.dev);
+ const struct intel_crtc_state *new_slave_crtc_state;
+ const struct intel_crtc_state *new_crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
+ struct intel_crtc *slave_crtc;
+ int i;
- drm_WARN_ON(&i915->drm, !slave_crtc || !new_slave_crtc_state ||
- !old_slave_crtc_state);
+ for_each_new_intel_crtc_in_state(state, slave_crtc,
+ new_slave_crtc_state, i) {
+ if (new_slave_crtc_state->master_transcoder !=
+ new_crtc_state->cpu_transcoder)
+ continue;
- drm_dbg_kms(&i915->drm,
- "Updating Transcoder Port Sync Master CRTC = %d %s and Slave CRTC %d %s\n",
- crtc->base.base.id, crtc->base.name,
- slave_crtc->base.base.id, slave_crtc->base.name);
+ drm_dbg_kms(&i915->drm,
+ "Updating transcoder port sync slave [CRTC:%d:%s]\n",
+ slave_crtc->base.base.id, slave_crtc->base.name);
- /* Enable seq for slave with with DP_TP_CTL left Idle until the
- * master is ready
- */
- intel_enable_crtc(state, slave_crtc);
+ intel_enable_crtc(state, slave_crtc);
+ }
+
+ drm_dbg_kms(&i915->drm,
+ "Updating transcoder port sync master [CRTC:%d:%s]\n",
+ crtc->base.base.id, crtc->base.name);
- /* Enable seq for master with with DP_TP_CTL left Idle */
intel_enable_crtc(state, crtc);
- /* Set Slave's DP_TP_CTL to Normal */
- intel_set_dp_tp_ctl_normal(slave_crtc,
- state);
+ for_each_new_intel_crtc_in_state(state, slave_crtc,
+ new_slave_crtc_state, i) {
+ if (new_slave_crtc_state->master_transcoder !=
+ new_crtc_state->cpu_transcoder)
+ continue;
+
+ intel_set_dp_tp_ctl_normal(state, slave_crtc);
+ }
- /* Set Master's DP_TP_CTL To Normal */
usleep_range(200, 400);
- intel_set_dp_tp_ctl_normal(crtc,
- state);
+ intel_set_dp_tp_ctl_normal(state, crtc);
+
+ for_each_new_intel_crtc_in_state(state, slave_crtc,
+ new_slave_crtc_state, i) {
+ if (new_slave_crtc_state->master_transcoder !=
+ new_crtc_state->cpu_transcoder)
+ continue;
+
+ intel_update_crtc(state, slave_crtc);
+ }
- /* Now do the post crtc enable for all master and slaves */
- intel_update_crtc(state, slave_crtc);
intel_update_crtc(state, crtc);
}
@@ -15256,8 +15255,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
* Enable all pipes that needs a modeset and do not depends on other
* pipes
*/
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
enum pipe pipe = crtc->pipe;
if ((modeset_pipes & BIT(pipe)) == 0)
@@ -15274,16 +15272,21 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
modeset_pipes &= ~BIT(pipe);
if (is_trans_port_sync_mode(new_crtc_state)) {
+ const struct intel_crtc_state *new_slave_crtc_state;
struct intel_crtc *slave_crtc;
+ int i;
- intel_update_trans_port_sync_crtcs(crtc, state,
- old_crtc_state,
- new_crtc_state);
+ intel_update_trans_port_sync_crtcs(state, crtc);
- slave_crtc = intel_get_slave_crtc(new_crtc_state);
- /* TODO: update entries[] of slave */
- modeset_pipes &= ~BIT(slave_crtc->pipe);
+ for_each_new_intel_crtc_in_state(state, slave_crtc,
+ new_slave_crtc_state, i) {
+ if (new_slave_crtc_state->master_transcoder !=
+ new_crtc_state->cpu_transcoder)
+ continue;
+ /* TODO: update entries[] of slave */
+ modeset_pipes &= ~BIT(slave_crtc->pipe);
+ }
} else {
intel_enable_crtc(state, crtc);
intel_update_crtc(state, crtc);
--
2.28.0