From f21484f145d5186173d857568f5da8ae68689d98 Mon Sep 17 00:00:00 2001
From: Le Ma <le.ma@amd.com>
Date: Thu, 19 Dec 2019 19:26:02 +0800
Subject: drm/amdgpu: fix ctx init failure for asics without gfx ring
Git-commit: 0a96afc7c56cbac075426a6a5f82a88cadb648f7
Patch-mainline: v5.6-rc1
References: jsc#SLE-12680, jsc#SLE-12880, jsc#SLE-12882, jsc#SLE-12883, jsc#SLE-13496, jsc#SLE-15322
This workaround does not affect other asics because amdgpu only need expose
one gfx sched to user for now.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Patrik Jakobsson <pjakobsson@suse.de>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index 63f6365312d5..64e2babbc36e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -127,7 +127,8 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
switch (i) {
case AMDGPU_HW_IP_GFX:
- scheds = adev->gfx.gfx_sched;
+ sched = &adev->gfx.gfx_ring[0].sched;
+ scheds = &sched;
num_scheds = 1;
break;
case AMDGPU_HW_IP_COMPUTE:
--
2.28.0