From 49a6cccec4f89777a0ffd2a6d4c3b1af33636b3a Mon Sep 17 00:00:00 2001
From: Jack Xu <jack.xu@intel.com>
Date: Fri, 6 Nov 2020 19:27:41 +0800
Subject: [PATCH] crypto: qat - fix CSR access
Git-commit: 49a6cccec4f89777a0ffd2a6d4c3b1af33636b3a
References: jsc#SLE-14454
Patch-mainline: v5.11-rc1
Do not mask the AE number with the AE mask when accessing the AE local
CSRs. Bit 12 of the local CSR address is the start of AE number so just
take out the AE mask here.
Signed-off-by: Jack Xu <jack.xu@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Oliver Neukum <oneukum@suse.com>
---
drivers/crypto/qat/qat_common/icp_qat_hal.h | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/qat/qat_common/icp_qat_hal.h b/drivers/crypto/qat/qat_common/icp_qat_hal.h
index c0e9fc0c93dd..b48b313623fe 100644
--- a/drivers/crypto/qat/qat_common/icp_qat_hal.h
+++ b/drivers/crypto/qat/qat_common/icp_qat_hal.h
@@ -94,15 +94,13 @@ enum fcu_sts {
#define SET_GLB_CSR(handle, csr, val) SET_CAP_CSR(handle, csr + GLOBAL_CSR, val)
#define GET_GLB_CSR(handle, csr) GET_CAP_CSR(handle, GLOBAL_CSR + csr)
#define AE_CSR(handle, ae) \
- ((char __iomem *)handle->hal_cap_ae_local_csr_addr_v + \
- ((ae & handle->hal_handle->ae_mask) << 12))
+ ((char __iomem *)handle->hal_cap_ae_local_csr_addr_v + (ae << 12))
#define AE_CSR_ADDR(handle, ae, csr) (AE_CSR(handle, ae) + (0x3ff & csr))
#define SET_AE_CSR(handle, ae, csr, val) \
ADF_CSR_WR(AE_CSR_ADDR(handle, ae, csr), 0, val)
#define GET_AE_CSR(handle, ae, csr) ADF_CSR_RD(AE_CSR_ADDR(handle, ae, csr), 0)
#define AE_XFER(handle, ae) \
- ((char __iomem *)handle->hal_cap_ae_xfer_csr_addr_v + \
- ((ae & handle->hal_handle->ae_mask) << 12))
+ ((char __iomem *)handle->hal_cap_ae_xfer_csr_addr_v + (ae << 12))
#define AE_XFER_ADDR(handle, ae, reg) (AE_XFER(handle, ae) + \
((reg & 0xff) << 2))
#define SET_AE_XFER(handle, ae, reg, val) \
--
2.26.2