From: Pratyush Yadav <p.yadav@ti.com>
Date: Wed, 24 Jun 2020 00:00:24 +0530
Subject: mtd: spi-nor: sfdp: do not make invalid quad enable fatal
Git-commit: 5cec8bc3707be699e2ace103bb4daecfdd0d3386
Patch-mainline: v5.9-rc1
References: jsc#SLE-14214 jsc#SLE-16606
The Micron MT35XU512ABA flash does not support the quad enable bit. But
instead of programming the Quad Enable Require field to 000b ("Device
does not have a QE bit"), it is programmed to 111b ("Reserved").
While this is technically incorrect, it is not reason enough to abort
BFPT parsing. Instead, continue BFPT parsing and let flashes set it in
their fixup hooks.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200623183030.26591-12-p.yadav@ti.com
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
---
drivers/mtd/spi-nor/sfdp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
index 55c0c508464b..e2a43d39eb5f 100644
--- a/drivers/mtd/spi-nor/sfdp.c
+++ b/drivers/mtd/spi-nor/sfdp.c
@@ -598,7 +598,8 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
break;
default:
- return -EINVAL;
+ dev_dbg(nor->dev, "BFPT QER reserved value used\n");
+ break;
}
/* Stop here if not JESD216 rev C or later. */
--
2.28.0