Blob Blame History Raw
From ab68b220e81fd03383c0d9e1a87b51f9bbe4db77 Mon Sep 17 00:00:00 2001
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Thu, 24 Oct 2019 17:33:43 +0300
Subject: [PATCH] pinctrl: baytrail: Group GPIO IRQ chip initialization
Git-commit: ab68b220e81fd03383c0d9e1a87b51f9bbe4db77
Patch-mainline: v5.6-rc1
References: jsc#SLE-12730

After commit 5ea422750a9f ("pinctrl: baytrail: Pass irqchip when
adding gpiochip") the GPIO IRQ chip structure is being initialized
under conditional when IRQ resource has been discovered. But that
commit left aside the assignment of ->init_valid_mask() callback
that is done unconditionally.

For sake of consistency and preventing some garbage in GPIO IRQ chip
structure group initialization together.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Takashi Iwai <tiwai@suse.de>

---
 drivers/pinctrl/intel/pinctrl-baytrail.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 72ffd19448e5..d829843314ba 100644
--- a/drivers/pinctrl/intel/pinctrl-baytrail.c
+++ b/drivers/pinctrl/intel/pinctrl-baytrail.c
@@ -1529,7 +1529,6 @@ static int byt_gpio_probe(struct byt_gpio *vg)
 	gc->add_pin_ranges = byt_gpio_add_pin_ranges;
 	gc->parent	= &vg->pdev->dev;
 	gc->ngpio	= vg->soc_data->npins;
-	gc->irq.init_valid_mask	= byt_init_irq_valid_mask;
 
 #ifdef CONFIG_PM_SLEEP
 	vg->saved_context = devm_kcalloc(&vg->pdev->dev, gc->ngpio,
@@ -1553,6 +1552,7 @@ static int byt_gpio_probe(struct byt_gpio *vg)
 		girq = &gc->irq;
 		girq->chip = &vg->irqchip;
 		girq->init_hw = byt_gpio_irq_init_hw;
+		girq->init_valid_mask = byt_init_irq_valid_mask;
 		girq->parent_handler = byt_gpio_irq_handler;
 		girq->num_parents = 1;
 		girq->parents = devm_kcalloc(&vg->pdev->dev, girq->num_parents,
-- 
2.16.4