From 76347d7ad250b46c4dbeb0e1fe629ed3c72cf004 Mon Sep 17 00:00:00 2001
From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Mon, 25 Nov 2019 19:15:34 +0200
Subject: [PATCH] pinctrl: lynxpoint: Assume 2 bits for mode selector
Git-commit: 76347d7ad250b46c4dbeb0e1fe629ed3c72cf004
Patch-mainline: v5.6-rc1
References: jsc#SLE-12730
New generations can use 2 bits for mode selector.
Update the code to support it.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Takashi Iwai <tiwai@suse.de>
---
drivers/pinctrl/intel/pinctrl-lynxpoint.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c
index 17a7843c8dc9..4b2e3f298641 100644
--- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c
+++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c
@@ -38,7 +38,9 @@
#define TRIG_SEL_BIT BIT(4) /* 0: Edge, 1: Level */
#define INT_INV_BIT BIT(3) /* Invert interrupt triggering */
#define DIR_BIT BIT(2) /* 0: Output, 1: Input */
-#define USE_SEL_BIT BIT(0) /* 0: Native, 1: GPIO */
+#define USE_SEL_MASK GENMASK(1, 0) /* 0: Native, 1: GPIO, ... */
+#define USE_SEL_NATIVE (0 << 0)
+#define USE_SEL_GPIO (1 << 0)
/* LP_CONFIG2 reg bits */
#define GPINDIS_BIT BIT(2) /* disable input sensing */
@@ -111,7 +113,7 @@ static int lp_gpio_request(struct gpio_chip *chip, unsigned offset)
return -EBUSY;
}
/* Fail if pin is in alternate function mode (not GPIO mode) */
- if (!(inl(reg) & USE_SEL_BIT))
+ if ((inl(reg) & USE_SEL_MASK) != USE_SEL_GPIO)
return -ENODEV;
/* enable input sensing */
--
2.16.4