From 033a856c73683924e28e329502572c413beb86c0 Mon Sep 17 00:00:00 2001
From: Anusha Srivatsa <anusha.srivatsa@intel.com>
Date: Fri, 2 Aug 2019 11:38:56 -0700
Subject: [PATCH] drm/i915/dmc: Load DMC on TGL
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Git-commit: 033a856c73683924e28e329502572c413beb86c0
Patch-mainline: v5.4-rc1
References: jsc#SLE-7953
Add Support to load DMC v2.03 on TGL.
V2: Use version 2.03 that is already available since that works with PSR2
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190802183856.27280-1-lucas.demarchi@intel.com
Acked-by: Takashi Iwai <tiwai@suse.de>
---
drivers/gpu/drm/i915/intel_csr.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index 6ef74531588a..8279e72edf4c 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -39,6 +39,11 @@
#define GEN12_CSR_MAX_FW_SIZE ICL_CSR_MAX_FW_SIZE
+#define TGL_CSR_PATH "i915/tgl_dmc_ver2_03.bin"
+#define TGL_CSR_VERSION_REQUIRED CSR_VERSION(2, 3)
+#define TGL_CSR_MAX_FW_SIZE 0x6000
+MODULE_FIRMWARE(TGL_CSR_PATH);
+
#define ICL_CSR_PATH "i915/icl_dmc_ver1_07.bin"
#define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7)
#define ICL_CSR_MAX_FW_SIZE 0x6000
@@ -674,6 +679,8 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
intel_csr_runtime_pm_get(dev_priv);
if (INTEL_GEN(dev_priv) >= 12) {
+ csr->fw_path = TGL_CSR_PATH;
+ csr->required_version = TGL_CSR_VERSION_REQUIRED;
/* Allow to load fw via parameter using the last known size */
csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE;
} else if (IS_GEN(dev_priv, 11)) {
--
2.16.4