From b02ff126898939a685c9a066b5d80dde3ff1c66f Mon Sep 17 00:00:00 2001
From: Xiaojie Yuan <xiaojie.yuan@amd.com>
Date: Wed, 13 Feb 2019 03:44:10 +0800
Subject: drm/amdgpu/smu11: add support for navi14
Git-commit: b02ff126898939a685c9a066b5d80dde3ff1c66f
Patch-mainline: v5.4-rc1
References: bsc#1152489
Same as navi10.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 1 +
drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 5 +++++
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index f1565c448de5..d977d68320c9 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -538,6 +538,7 @@ static int smu_set_funcs(struct amdgpu_device *adev)
switch (adev->asic_type) {
case CHIP_VEGA20:
case CHIP_NAVI10:
+ case CHIP_NAVI14:
if (adev->pm.pp_feature & PP_OVERDRIVE_MASK)
smu->od_enabled = true;
smu_v11_0_set_smu_funcs(smu);
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 95c7c4dae523..0e9eead6ad29 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -46,6 +46,7 @@
MODULE_FIRMWARE("amdgpu/vega20_smc.bin");
MODULE_FIRMWARE("amdgpu/navi10_smc.bin");
+MODULE_FIRMWARE("amdgpu/navi14_smc.bin");
#define SMU11_VOLTAGE_SCALE 4
@@ -157,6 +158,9 @@ static int smu_v11_0_init_microcode(struct smu_context *smu)
case CHIP_NAVI10:
chip_name = "navi10";
break;
+ case CHIP_NAVI14:
+ chip_name = "navi14";
+ break;
default:
BUG();
}
@@ -1799,6 +1803,7 @@ void smu_v11_0_set_smu_funcs(struct smu_context *smu)
vega20_set_ppt_funcs(smu);
break;
case CHIP_NAVI10:
+ case CHIP_NAVI14:
navi10_set_ppt_funcs(smu);
break;
default:
--
2.28.0