From ba02636de54e7c2f8d549401ce9c9f508a05ef7a Mon Sep 17 00:00:00 2001
From: Jack Xiao <Jack.Xiao@amd.com>
Date: Fri, 5 Jul 2019 16:00:08 -0500
Subject: drm/amdgpu: enable gfxoff code path for navi14
Git-commit: ba02636de54e7c2f8d549401ce9c9f508a05ef7a
Patch-mainline: v5.4-rc1
References: bsc#1152489

Based on navi10 gfxoff logic, enable the related code
path for navi14.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c    | 4 +---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c     | 1 +
 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 3 ---
 drivers/gpu/drm/amd/powerplay/smu_v11_0.c  | 1 +
 4 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 409725f40802..1f9105a6c050 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -998,9 +998,7 @@ static int psp_np_fw_load(struct psp_context *psp)
 			return ret;
 
 		/* Start rlc autoload after psp recieved all the gfx firmware */
-		if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM ||
-		    (adev->asic_type == CHIP_NAVI14 &&
-		     ucode->ucode_id == AMDGPU_UCODE_ID_RLC_G)) {
+		if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM) {
 			ret = psp_rlc_autoload(psp);
 			if (ret) {
 				DRM_ERROR("Failed to start rlc autoload\n");
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 0cf7c3faa91f..ec11bfded772 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -4105,6 +4105,7 @@ static int gfx_v10_0_set_powergating_state(void *handle,
 	bool enable = (state == AMD_PG_STATE_GATE) ? true : false;
 	switch (adev->asic_type) {
 	case CHIP_NAVI10:
+	case CHIP_NAVI14:
 		if (!enable) {
 			amdgpu_gfx_off_ctrl(adev, false);
 			cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work);
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index 1ac9db3aa5bc..d977d68320c9 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -559,9 +559,6 @@ static int smu_early_init(void *handle)
 	smu->pm_enabled = !!amdgpu_dpm;
 	mutex_init(&smu->mutex);
 
-	if (adev->asic_type == CHIP_NAVI14)
-		adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
-
 	return smu_set_funcs(adev);
 }
 
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 0e9eead6ad29..1315958e5d81 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -1359,6 +1359,7 @@ static int smu_v11_0_gfx_off_control(struct smu_context *smu, bool enable)
 	case CHIP_VEGA20:
 		break;
 	case CHIP_NAVI10:
+	case CHIP_NAVI14:
 		if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
 			return 0;
 		mutex_lock(&smu->mutex);
-- 
2.28.0