From 4bb6b8c758fe3a9225e3003a3fb35d16cac1baeb Mon Sep 17 00:00:00 2001
From: Dennis Li <Dennis.Li@amd.com>
Date: Fri, 19 Jul 2019 14:50:25 +0800
Subject: drm/amd/include: add define of TCP_EDC_CNT_NEW
Git-commit: 4bb6b8c758fe3a9225e3003a3fb35d16cac1baeb
Patch-mainline: v5.4-rc1
References: bsc#1152489
Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
---
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
index f1d048e0ed2c..ca16d9125fbc 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
@@ -1700,6 +1700,8 @@
#define mmTCP_BUFFER_ADDR_HASH_CNTL_BASE_IDX 0
#define mmTCP_EDC_CNT 0x0b17
#define mmTCP_EDC_CNT_BASE_IDX 0
+#define mmTCP_EDC_CNT_NEW 0x0b18
+#define mmTCP_EDC_CNT_NEW_BASE_IDX 0
#define mmTC_CFG_L1_LOAD_POLICY0 0x0b1a
#define mmTC_CFG_L1_LOAD_POLICY0_BASE_IDX 0
#define mmTC_CFG_L1_LOAD_POLICY1 0x0b1b
--
2.28.0