From edc641b2b2f494ce74a2f657544133faf451a80c Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs@redhat.com>
Date: Wed, 12 Jun 2019 17:37:23 +1000
Subject: drm/nouveau/kms/gv100-: attach pixel blend mode property to planes
Git-commit: edc641b2b2f494ce74a2f657544133faf451a80c
Patch-mainline: v5.4-rc1
References: bsc#1152489

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
---
 drivers/gpu/drm/nouveau/dispnv50/atom.h     |  2 ++
 drivers/gpu/drm/nouveau/dispnv50/wndw.c     | 22 +++++++++++++++++++++
 drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c |  5 ++++-
 3 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv50/atom.h b/drivers/gpu/drm/nouveau/dispnv50/atom.h
index 973074403f3c..43df86c38f58 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/atom.h
+++ b/drivers/gpu/drm/nouveau/dispnv50/atom.h
@@ -224,6 +224,8 @@ struct nv50_wndw_atom {
 	struct {
 		u8 depth;
 		u8 k1;
+		u8 src_color:4;
+		u8 dst_color:4;
 	} blend;
 
 	union nv50_wndw_atom_mask {
diff --git a/drivers/gpu/drm/nouveau/dispnv50/wndw.c b/drivers/gpu/drm/nouveau/dispnv50/wndw.c
index 76c69c6eca77..2db029371c91 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/wndw.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/wndw.c
@@ -289,6 +289,21 @@ nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw, bool modeset,
 	if (wndw->func->blend_set) {
 		asyw->blend.depth = 255 - asyw->state.normalized_zpos;
 		asyw->blend.k1 = asyw->state.alpha >> 8;
+		switch (asyw->state.pixel_blend_mode) {
+		case DRM_MODE_BLEND_PREMULTI:
+			asyw->blend.src_color = 2; /* K1 */
+			asyw->blend.dst_color = 7; /* NEG_K1_TIMES_SRC */
+			break;
+		case DRM_MODE_BLEND_COVERAGE:
+			asyw->blend.src_color = 5; /* K1_TIMES_SRC */
+			asyw->blend.dst_color = 7; /* NEG_K1_TIMES_SRC */
+			break;
+		case DRM_MODE_BLEND_PIXEL_NONE:
+		default:
+			asyw->blend.src_color = 2; /* K1 */
+			asyw->blend.dst_color = 4; /* NEG_K1 */
+			break;
+		}
 		if (memcmp(&armw->blend, &asyw->blend, sizeof(asyw->blend)))
 			asyw->set.blend = true;
 	}
@@ -661,6 +676,13 @@ nv50_wndw_new_(const struct nv50_wndw_func *func, struct drm_device *dev,
 		ret = drm_plane_create_alpha_property(&wndw->plane);
 		if (ret)
 			return ret;
+
+		ret = drm_plane_create_blend_mode_property(&wndw->plane,
+				BIT(DRM_MODE_BLEND_PIXEL_NONE) |
+				BIT(DRM_MODE_BLEND_PREMULTI) |
+				BIT(DRM_MODE_BLEND_COVERAGE));
+		if (ret)
+			return ret;
 	} else {
 		ret = drm_plane_create_zpos_immutable_property(&wndw->plane,
 				nv50_wndw_zpos_default(&wndw->plane));
diff --git a/drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c b/drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c
index 3c6d64d1b708..0f9402162bde 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c
@@ -89,7 +89,10 @@ wndwc37e_blend_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
 		evo_mthd(push, 0x02ec, 7);
 		evo_data(push, asyw->blend.depth << 4);
 		evo_data(push, asyw->blend.k1);
-		evo_data(push, 0x00007722);
+		evo_data(push, asyw->blend.dst_color << 12 |
+			       asyw->blend.dst_color << 8 |
+			       asyw->blend.src_color << 4 |
+			       asyw->blend.src_color);
 		evo_data(push, 0xffff0000);
 		evo_data(push, 0xffff0000);
 		evo_data(push, 0xffff0000);
-- 
2.28.0