From 080deab66d4f766ce83cb8348070ac14fba92302 Mon Sep 17 00:00:00 2001
From: Huang Rui <ray.huang@amd.com>
Date: Wed, 24 Jul 2019 13:39:36 -0500
Subject: drm/amdgpu: add soc15 common ip block support for renoir
Git-commit: 080deab66d4f766ce83cb8348070ac14fba92302
Patch-mainline: v5.4-rc1
References: bsc#1152489
This patch adds common ip support for renoir.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index ece2559df537..043b7a452555 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -637,6 +637,7 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)
case CHIP_VEGA10:
case CHIP_VEGA12:
case CHIP_RAVEN:
+ case CHIP_RENOIR:
vega10_reg_base_init(adev);
break;
case CHIP_VEGA20:
@@ -1133,6 +1134,11 @@ static int soc15_common_early_init(void *handle)
adev->pg_flags = 0;
adev->external_rev_id = adev->rev_id + 0x32;
break;
+ case CHIP_RENOIR:
+ adev->cg_flags = 0;
+ adev->pg_flags = 0;
+ adev->external_rev_id = adev->rev_id + 0x91;
+ break;
default:
/* FIXME: not supported yet */
return -EINVAL;
--
2.28.0