From 2c58cc6dc0e15c62157430ee58f8efdae2aa7934 Mon Sep 17 00:00:00 2001
From: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Date: Mon, 22 Jul 2019 14:12:25 -0400
Subject: drm/amd/display: HUBP/HUBBUB register programming fixes
Git-commit: 2c58cc6dc0e15c62157430ee58f8efdae2aa7934
Patch-mainline: v5.4-rc1
References: bsc#1152489
[Why]
- Need to change interface function signature / add an enum
to reflect the available register field values
[How]
- Add a new enum and modify existing functions to use it instead
of bool
Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h | 2 +-
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h | 2 +-
drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 8 +++++++-
5 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
index 03f5aa10c4c4..001db49e4bb2 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
@@ -509,7 +509,7 @@ bool hubp1_program_surface_flip_and_addr(
}
void hubp1_dcc_control(struct hubp *hubp, bool enable,
- bool independent_64b_blks)
+ enum hubp_ind_block_size independent_64b_blks)
{
uint32_t dcc_en = enable ? 1 : 0;
uint32_t dcc_ind_64b_blk = independent_64b_blks ? 1 : 0;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
index 91116b3d4b48..cb20d10288c0 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
@@ -698,7 +698,7 @@ void hubp1_program_tiling(
void hubp1_dcc_control(struct hubp *hubp,
bool enable,
- bool independent_64b_blks);
+ enum hubp_ind_block_size independent_64b_blks);
#ifdef CONFIG_DRM_AMD_DC_DCN2_0
bool hubp1_program_surface_flip_and_addr(
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
index ac01e636ae27..b4b384c7fa9b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
@@ -397,7 +397,7 @@ void hubp2_program_rotation(
}
void hubp2_dcc_control(struct hubp *hubp, bool enable,
- bool independent_64b_blks)
+ enum hubp_ind_block_size independent_64b_blks)
{
uint32_t dcc_en = enable ? 1 : 0;
uint32_t dcc_ind_64b_blk = independent_64b_blks ? 1 : 0;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h
index 924699e5f443..c4ed8f1b9424 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h
@@ -252,7 +252,7 @@ bool hubp2_program_surface_flip_and_addr(
bool flip_immediate);
void hubp2_dcc_control(struct hubp *hubp, bool enable,
- bool independent_64b_blks);
+ enum hubp_ind_block_size independent_64b_blks);
void hubp2_program_size(
struct hubp *hubp,
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
index 4993f134e747..809b62b51a43 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
@@ -47,6 +47,11 @@ enum cursor_lines_per_chunk {
CURSOR_LINE_PER_CHUNK_16
};
+enum hubp_ind_block_size {
+ hubp_ind_block_unconstrained = 0,
+ hubp_ind_block_64b,
+};
+
struct hubp {
const struct hubp_funcs *funcs;
struct dc_context *ctx;
@@ -74,7 +79,8 @@ struct hubp_funcs {
struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
void (*dcc_control)(struct hubp *hubp, bool enable,
- bool independent_64b_blks);
+ enum hubp_ind_block_size blk_size);
+
void (*mem_program_viewport)(
struct hubp *hubp,
const struct rect *viewport,
--
2.28.0