From f82effc4e59260f6826b497e5158742a8f5b59df Mon Sep 17 00:00:00 2001
From: Roman Li <Roman.Li@amd.com>
Date: Thu, 8 Aug 2019 15:11:37 -0400
Subject: drm/amd/display: Correct order of RV family clk managers for Renoir
Git-commit: f82effc4e59260f6826b497e5158742a8f5b59df
Patch-mainline: v5.4-rc1
References: bsc#1152489

Need to check for renoir first.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
---
 drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
index e211d4f65536..c43797bea413 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
@@ -111,6 +111,12 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p
 
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
 	case FAMILY_RV:
+#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
+		if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)) {
+			rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
+			break;
+		}
+#endif	/* DCN2_1 */
 		if (ASICREV_IS_RAVEN2(asic_id.hw_internal_rev)) {
 			rv2_clk_mgr_construct(ctx, clk_mgr, pp_smu);
 			break;
@@ -120,12 +126,6 @@ struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *p
 			rv1_clk_mgr_construct(ctx, clk_mgr, pp_smu);
 			break;
 		}
-#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
-		if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev)) {
-			rn_clk_mgr_construct(ctx, clk_mgr, pp_smu, dccg);
-			break;
-		}
-#endif	/* DCN2_1 */
 		break;
 #endif	/* Family RV */
 
-- 
2.28.0