From: Charlene Liu <charlene.liu@amd.com>
Date: Tue, 22 Aug 2017 20:15:28 -0400
Subject: drm/amd/display: Block 6Ghz timing if SBIOS set HDMI_6G_en to 0
Git-commit: 577b5c2b51014b3c276ab1d456aaad965dbb4930
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c | 1 +
drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c | 4 ++++
drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h | 1 +
3 files changed, 6 insertions(+)
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
@@ -1853,6 +1853,7 @@ static enum bp_result bios_parser_get_en
info->DP_HBR2_EN = record->usHBR2En;
info->DP_HBR3_EN = record->usHBR3En;
+ info->HDMI_6GB_EN = record->usHDMI6GEn;
return BP_RESULT_OK;
}
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c
@@ -887,6 +887,9 @@ static bool dce110_link_encoder_validate
crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR420)
return false;
+ if (!enc110->base.features.flags.bits.HDMI_6GB_EN &&
+ adjusted_pix_clk_khz >= 300000)
+ return false;
return true;
}
@@ -1008,6 +1011,7 @@ bool dce110_link_encoder_construct(
bp_cap_info.DP_HBR2_EN;
enc110->base.features.flags.bits.IS_HBR3_CAPABLE =
bp_cap_info.DP_HBR3_EN;
+ enc110->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN;
}
return true;
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
@@ -37,6 +37,7 @@ struct encoder_feature_support {
uint32_t IS_TPS3_CAPABLE:1;
uint32_t IS_TPS4_CAPABLE:1;
uint32_t IS_YCBCR_CAPABLE:1;
+ uint32_t HDMI_6GB_EN:1;
} bits;
uint32_t raw;
} flags;