From: Yongqiang Sun <yongqiang.sun@amd.com>
Date: Thu, 16 Nov 2017 12:43:59 -0500
Subject: drm/amd/display: Fixed read wrong reg to get bot_sel.
Git-commit: c1fba8204b909d195f9dc4a638921260ac792124
Patch-mainline: v4.16-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c
@@ -372,7 +372,7 @@ void mpc1_init_mpcc_list_from_hw(
 		for (mpcc_id = 0; mpcc_id < mpc10->num_mpcc; mpcc_id++) {
 			REG_GET(MPCC_OPP_ID[mpcc_id],  MPCC_OPP_ID,  &opp_id);
 			REG_GET(MPCC_TOP_SEL[mpcc_id], MPCC_TOP_SEL, &top_sel);
-			REG_GET(MPCC_STATUS[mpcc_id],  MPCC_BOT_SEL, &bot_sel);
+			REG_GET(MPCC_BOT_SEL[mpcc_id],  MPCC_BOT_SEL, &bot_sel);
 
 			if ((opp_id == tree->opp_id) && (top_sel != 0xf)) {
 				mpcc = mpc1_get_mpcc(mpc, mpcc_id);