From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Date: Tue, 13 Feb 2018 14:00:22 +0200
Subject: drm: omapdrm: dss: Pass PLL pointer to dss_ctrl_pll_enable()
Git-commit: 2726099921caab2473dca91c9ddc4f4a108f4c15
Patch-mainline: v4.17-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

This will allow accessing the PLL data to get the DSS device pointer,
removing the need to access the global DSS private data.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/omapdrm/dss/dss.c       |   13 +++++++------
 drivers/gpu/drm/omapdrm/dss/dss.h       |    2 +-
 drivers/gpu/drm/omapdrm/dss/hdmi_pll.c  |    4 ++--
 drivers/gpu/drm/omapdrm/dss/video-pll.c |    6 +++---
 4 files changed, 13 insertions(+), 12 deletions(-)

--- a/drivers/gpu/drm/omapdrm/dss/dss.c
+++ b/drivers/gpu/drm/omapdrm/dss/dss.c
@@ -152,17 +152,17 @@ static void dss_restore_context(void)
 #undef SR
 #undef RR
 
-void dss_ctrl_pll_enable(enum dss_pll_id pll_id, bool enable)
+void dss_ctrl_pll_enable(struct dss_pll *pll, bool enable)
 {
 	unsigned int shift;
 	unsigned int val;
 
-	if (!dss.syscon_pll_ctrl)
+	if (!pll->dss->syscon_pll_ctrl)
 		return;
 
 	val = !enable;
 
-	switch (pll_id) {
+	switch (pll->id) {
 	case DSS_PLL_VIDEO1:
 		shift = 0;
 		break;
@@ -173,12 +173,13 @@ void dss_ctrl_pll_enable(enum dss_pll_id
 		shift = 2;
 		break;
 	default:
-		DSSERR("illegal DSS PLL ID %d\n", pll_id);
+		DSSERR("illegal DSS PLL ID %d\n", pll->id);
 		return;
 	}
 
-	regmap_update_bits(dss.syscon_pll_ctrl, dss.syscon_pll_ctrl_offset,
-		1 << shift, val << shift);
+	regmap_update_bits(pll->dss->syscon_pll_ctrl,
+			   pll->dss->syscon_pll_ctrl_offset,
+			   1 << shift, val << shift);
 }
 
 static int dss_ctrl_pll_set_control_mux(enum dss_clk_source clk_src,
--- a/drivers/gpu/drm/omapdrm/dss/dss.h
+++ b/drivers/gpu/drm/omapdrm/dss/dss.h
@@ -310,7 +310,7 @@ struct dss_pll *dss_video_pll_init(struc
 				   struct regulator *regulator);
 void dss_video_pll_uninit(struct dss_pll *pll);
 
-void dss_ctrl_pll_enable(enum dss_pll_id pll_id, bool enable);
+void dss_ctrl_pll_enable(struct dss_pll *pll, bool enable);
 
 void dss_sdi_init(int datapairs);
 int dss_sdi_enable(void);
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
@@ -48,7 +48,7 @@ static int hdmi_pll_enable(struct dss_pl
 	r = pm_runtime_get_sync(&pll->pdev->dev);
 	WARN_ON(r < 0);
 
-	dss_ctrl_pll_enable(DSS_PLL_HDMI, true);
+	dss_ctrl_pll_enable(dsspll, true);
 
 	r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS);
 	if (r)
@@ -65,7 +65,7 @@ static void hdmi_pll_disable(struct dss_
 
 	hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF);
 
-	dss_ctrl_pll_enable(DSS_PLL_HDMI, false);
+	dss_ctrl_pll_enable(dsspll, false);
 
 	r = pm_runtime_put_sync(&pll->pdev->dev);
 	WARN_ON(r < 0 && r != -ENOSYS);
--- a/drivers/gpu/drm/omapdrm/dss/video-pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/video-pll.c
@@ -68,7 +68,7 @@ static int dss_video_pll_enable(struct d
 	if (r)
 		return r;
 
-	dss_ctrl_pll_enable(pll->id, true);
+	dss_ctrl_pll_enable(pll, true);
 
 	dss_dpll_enable_scp_clk(vpll);
 
@@ -82,7 +82,7 @@ static int dss_video_pll_enable(struct d
 
 err_reset:
 	dss_dpll_disable_scp_clk(vpll);
-	dss_ctrl_pll_enable(pll->id, false);
+	dss_ctrl_pll_enable(pll, false);
 	dss_runtime_put(pll->dss);
 
 	return r;
@@ -96,7 +96,7 @@ static void dss_video_pll_disable(struct
 
 	dss_dpll_disable_scp_clk(vpll);
 
-	dss_ctrl_pll_enable(pll->id, false);
+	dss_ctrl_pll_enable(pll, false);
 
 	dss_runtime_put(pll->dss);
 }