From: oulijun <oulijun@huawei.com>
Date: Fri, 10 Nov 2017 16:55:45 +0800
Subject: RDMA/hns: Configure fence attribute in hip08 RoCE
Patch-mainline: v4.15-rc1
Git-commit: 651487c229d5fe7c6d65acbfb061089d8c899729
References: bsc#1104427 FATE#326416

When post wr for mixed rdma operation, we need to use fence
mechanism to keep the correct execute order.

Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Shaobo Xu <xushaobo2@huawei.com>
Signed-off-by: Yixian Liu <liuyixian@huawei.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
---
 drivers/infiniband/hw/hns/hns_roce_hw_v2.c |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -104,7 +104,6 @@ static int hns_roce_v2_post_send(struct
 		qp->sq.wrid[(qp->sq.head + nreq) & (qp->sq.wqe_cnt - 1)] =
 								      wr->wr_id;
 
-
 		rc_sq_wqe = wqe;
 		memset(rc_sq_wqe, 0, sizeof(*rc_sq_wqe));
 		for (i = 0; i < wr->num_sge; i++)
@@ -112,6 +111,9 @@ static int hns_roce_v2_post_send(struct
 
 		rc_sq_wqe->inv_key_immtdata = send_ieth(wr);
 
+		roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_FENCE_S,
+			    (wr->send_flags & IB_SEND_FENCE) ? 1 : 0);
+
 		switch (wr->opcode) {
 		case IB_WR_RDMA_READ:
 			roce_set_field(rc_sq_wqe->byte_4,