From af7651e67b9d5f7e63ea23b118e3672ac662244a Mon Sep 17 00:00:00 2001
From: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Date: Wed, 7 Jul 2021 16:12:13 +0300
Subject: [PATCH] clk: at91: clk-generated: Limit the requested rate to our
 range
Git-commit: af7651e67b9d5f7e63ea23b118e3672ac662244a
References: git-fixes
Patch-mainline: v5.15-rc1

On clk_generated_determine_rate(), the requested rate could be outside
of clk's range. Limit the rate to the clock's range to not return an
error.

Fixes: df70aeef6083 ("clk: at91: add generated clock driver")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Link: https://lore.kernel.org/r/20210707131213.3283509-1-codrin.ciubotariu@microchip.com
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Oliver Neukum <oneukum@suse.com>
---
 drivers/clk/at91/clk-generated.c |    6 ++++++
 1 file changed, 6 insertions(+)

--- a/drivers/clk/at91/clk-generated.c
+++ b/drivers/clk/at91/clk-generated.c
@@ -110,6 +110,12 @@ static int clk_generated_determine_rate(
 	int tmp_diff;
 	int i;
 
+	/* do not look for a rate that is outside of our range */
+	if (gck->range.max && req->rate > gck->range.max)
+		req->rate = gck->range.max;
+	if (gck->range.min && req->rate < gck->range.min)
+		req->rate = gck->range.min;
+
 	for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
 		u32 div;
 		unsigned long parent_rate;