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From fbfd76c3746a322a9f33f77b66f85d4f68cabe4a Mon Sep 17 00:00:00 2001
From: Changbin Du <changbin.du@intel.com>
Date: Tue, 6 Jun 2017 15:56:13 +0800
Subject: [PATCH] drm/i915/gvt: Add helper for tuning MMIO hash table
Git-commit: fbfd76c3746a322a9f33f77b66f85d4f68cabe4a
Patch-mainline: v4.13-rc1
References: FATE#322643 bsc#1055900

We count all the tracked virtual MMIO registers, which can help us to
tune the MMIO hash table.

V2: Move num_tracked_mmio into gvt structure.

Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Acked-by: Takashi Iwai <tiwai@suse.de>

---
 drivers/gpu/drm/i915/gvt/gvt.h      |    1 +
 drivers/gpu/drm/i915/gvt/handlers.c |    4 ++++
 2 files changed, 5 insertions(+)

--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -215,6 +215,7 @@ struct intel_gvt_mmio {
 #define F_UNALIGN	(1 << 6)
 
 	DECLARE_HASHTABLE(mmio_info_table, INTEL_GVT_MMIO_HASH_BITS);
+	unsigned int num_tracked_mmio;
 };
 
 struct intel_gvt_firmware {
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -124,6 +124,7 @@ static int new_mmio_info(struct intel_gv
 		gvt->mmio.mmio_attribute[info->offset / 4] = flags;
 		INIT_HLIST_NODE(&info->node);
 		hash_add(gvt->mmio.mmio_info_table, &info->node, info->offset);
+		gvt->mmio.num_tracked_mmio++;
 	}
 	return 0;
 }
@@ -2943,6 +2944,9 @@ int intel_gvt_setup_mmio_info(struct int
 		if (ret)
 			goto err;
 	}
+
+	gvt_dbg_mmio("traced %u virtual mmio registers\n",
+		     gvt->mmio.num_tracked_mmio);
 	return 0;
 err:
 	intel_gvt_clean_mmio_info(gvt);