From 0d535967ac658966c6ade8f82b5799092f7d5441 Mon Sep 17 00:00:00 2001
From: Miao Zhong <zhongmiao@hisilicon.com>
Date: Mon, 23 Jul 2018 20:56:58 +0800
Subject: [PATCH] iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register
Git-commit: 0d535967ac658966c6ade8f82b5799092f7d5441
Patch-mainline: v4.19-rc1
References: bsc#1051510

When PRI queue occurs overflow, driver should update the OVACKFLG to
the PRIQ consumer register, otherwise subsequent PRI requests will not
be processed.

Cc: Will Deacon <will.deacon@arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Miao Zhong <zhongmiao@hisilicon.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Takashi Iwai <tiwai@suse.de>

---
 drivers/iommu/arm-smmu-v3.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 1d647104bccc..deacc152f09f 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -1301,6 +1301,7 @@ static irqreturn_t arm_smmu_priq_thread(int irq, void *dev)
 
 	/* Sync our overflow flag, as we believe we're up to speed */
 	q->cons = Q_OVF(q, q->prod) | Q_WRP(q, q->cons) | Q_IDX(q, q->cons);
+	writel(q->cons, q->cons_reg);
 	return IRQ_HANDLED;
 }
 
-- 
2.16.4