From: Alex Deucher <alexander.deucher@amd.com>
Date: Thu, 13 Apr 2017 14:35:02 -0400
Subject: drm/amdgpu/gfx8: move CP_PQ_STATUS after doorbell range setting (v2)
Git-commit: 6a124e675aa4e0b3cc6f96aca8fe2b7fd3c00ae2
Patch-mainline: v4.13-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
I'm not sure if the order matters, but it seems like it makes
more sense to set this after the range is programmed.
v2: rebase (Alex)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -4894,9 +4894,6 @@ static int gfx_v8_0_kiq_init_register(st
/* activate the queue */
WREG32(mmCP_HQD_ACTIVE, mqd->cp_hqd_active);
- if (ring->use_doorbell)
- WREG32_FIELD(CP_PQ_STATUS, DOORBELL_ENABLE, 1);
-
return 0;
}
@@ -4973,6 +4970,8 @@ static void gfx_v8_0_set_mec_doorbell_ra
WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2);
WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2);
}
+ /* enable doorbells */
+ WREG32_FIELD(CP_PQ_STATUS, DOORBELL_ENABLE, 1);
}
static int gfx_v8_0_kiq_resume(struct amdgpu_device *adev)