From c80e6f1bdb0cb0a8c83034c3ac6b34b7328dc12a Mon Sep 17 00:00:00 2001
From: Tao Zhou <tao.zhou1@amd.com>
Date: Thu, 10 Feb 2022 15:46:12 +0800
Subject: drm/amdgpu: loose check for umc poison mode
Git-commit: 69f915cc97c4bb82b34105a47abf613f7c87215d
Patch-mainline: v5.18-rc1
References: jsc#PED-1166 jsc#PED-1168 jsc#PED-1170 jsc#PED-1218 jsc#PED-1220 jsc#PED-1222 jsc#PED-1223 jsc#PED-1225
No need to check poison setting for each channel, check for umc0
channel0 is enough.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Patrik Jakobsson <pjakobsson@suse.de>
---
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c | 18 +++++-------------
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
index 47452b61b615..e613511e07e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c
@@ -451,21 +451,13 @@ static uint32_t umc_v6_7_query_ras_poison_mode_per_channel(
static bool umc_v6_7_query_ras_poison_mode(struct amdgpu_device *adev)
{
- uint32_t umc_inst = 0;
- uint32_t ch_inst = 0;
uint32_t umc_reg_offset = 0;
- LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) {
- umc_reg_offset = get_umc_v6_7_reg_offset(adev,
- umc_inst,
- ch_inst);
- /* Enabling fatal error in one channel will be considered
- as fatal error mode */
- if (umc_v6_7_query_ras_poison_mode_per_channel(adev, umc_reg_offset))
- return false;
- }
-
- return true;
+ /* Enabling fatal error in umc instance0 channel0 will be
+ * considered as fatal error mode
+ */
+ umc_reg_offset = get_umc_v6_7_reg_offset(adev, 0, 0);
+ return !umc_v6_7_query_ras_poison_mode_per_channel(adev, umc_reg_offset);
}
const struct amdgpu_ras_block_hw_ops umc_v6_7_ras_hw_ops = {
--
2.38.1