From: Pu Lehui <pulehui@huawei.com>
Date: Thu, 24 Aug 2023 09:50:00 +0000
Subject: riscv, bpf: Support unconditional bswap insn
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Patch-mainline: v6.6-rc1
Git-commit: 83cc63afab718c5a31ce94d3e7f3827acc501042
References: jsc#PED-6811
Add support unconditional bswap instruction. Since riscv is always
little-endian, just treat the unconditional scenario the same as
big-endian conversion.
Signed-off-by: Pu Lehui <pulehui@huawei.com>
Acked-by: Björn Töpel <bjorn@kernel.org>
Link: https://lore.kernel.org/r/20230824095001.3408573-7-pulehui@huaweicloud.com
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Acked-by: Shung-Hsi Yu <shung-hsi.yu@suse.com>
---
arch/riscv/net/bpf_jit_comp64.c | 1 +
1 file changed, 1 insertion(+)
--- a/arch/riscv/net/bpf_jit_comp64.c
+++ b/arch/riscv/net/bpf_jit_comp64.c
@@ -1168,6 +1168,7 @@ int bpf_jit_emit_insn(const struct bpf_i
break;
case BPF_ALU | BPF_END | BPF_FROM_BE:
+ case BPF_ALU64 | BPF_END | BPF_FROM_LE:
emit_li(RV_REG_T2, 0, ctx);
emit_andi(RV_REG_T1, rd, 0xff, ctx);