Blob Blame History Raw
From fc72fbf4c922c6dffa76398a79953492fab9b3b8 Mon Sep 17 00:00:00 2001
From: Swati Sharma <swati2.sharma@intel.com>
Date: Tue, 29 Aug 2023 19:29:45 +0530
Subject: drm/i915/dg2: Add support for new DG2-G12 revid 0x1
Git-commit: 84bd5e9685948dfded818d35eeceab35f6e42f71
Patch-mainline: v6.7-rc1
References: jsc#PED-3527 jsc#PED-5475 jsc#PED-6068 jsc#PED-6070 jsc#PED-6116 jsc#PED-6120 jsc#PED-5065 jsc#PED-5477 jsc#PED-5511 jsc#PED-6041 jsc#PED-6069 jsc#PED-6071

The bspec has been updated with a new revision 0x1 that
translates to A1 GT stepping and C0 display stepping.

Bspec: 44477

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230829135945.1201574-1-swati2.sharma@intel.com
Acked-by: Patrik Jakobsson <pjakobsson@suse.de>
---
 drivers/gpu/drm/i915/intel_step.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
index c02a6f156a00..ee4e5a2c0220 100644
--- a/drivers/gpu/drm/i915/intel_step.c
+++ b/drivers/gpu/drm/i915/intel_step.c
@@ -124,6 +124,7 @@ static const struct intel_step_info dg2_g11_revid_step_tbl[] = {
 
 static const struct intel_step_info dg2_g12_revid_step_tbl[] = {
 	[0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_C0 },
+	[0x1] = { COMMON_GT_MEDIA_STEP(A1), .display_step = STEP_C0 },
 };
 
 static const struct intel_step_info adls_rpls_revids[] = {
-- 
2.43.0