From 0e9b00457b1a56488ded82b9261f2ab164886b4c Mon Sep 17 00:00:00 2001
From: Imre Deak <imre.deak@intel.com>
Date: Fri, 6 Oct 2023 16:37:14 +0300
Subject: drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_compute_max_bpp()
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Git-commit: f52bbfe2ac657c3bd82fdbdcdffc2c8054358b37
Patch-mainline: v6.7-rc1
References: jsc#PED-3527 jsc#PED-5475 jsc#PED-6068 jsc#PED-6070 jsc#PED-6116 jsc#PED-6120 jsc#PED-5065 jsc#PED-5477 jsc#PED-5511 jsc#PED-6041 jsc#PED-6069 jsc#PED-6071
Use the connector's DSC DPCD capabilities in intel_dp_dsc_compute_max_bpp()
instead of the version stored in the encoder.
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231006133727.1822579-7-imre.deak@intel.com
Acked-by: Patrik Jakobsson <pjakobsson@suse.de>
---
drivers/gpu/drm/i915/display/intel_dp.c | 13 ++++++++-----
drivers/gpu/drm/i915/display/intel_dp.h | 3 ++-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
3 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 78fa165a3d01..b666b5662458 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1215,7 +1215,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
* TBD pass the connector BPC,
* for now U8_MAX so that max BPC on that platform would be picked
*/
- pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp, U8_MAX);
+ pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
/*
* Output bpp is stored in 6.4 format so right shift by 4 to get the
@@ -1577,9 +1577,10 @@ u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915)
return 0;
}
-int intel_dp_dsc_compute_max_bpp(struct intel_dp *intel_dp, u8 max_req_bpc)
+int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector,
+ u8 max_req_bpc)
{
- struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ struct drm_i915_private *i915 = to_i915(connector->base.dev);
int i, num_bpc;
u8 dsc_bpc[3] = {0};
u8 dsc_max_bpc;
@@ -1591,7 +1592,7 @@ int intel_dp_dsc_compute_max_bpp(struct intel_dp *intel_dp, u8 max_req_bpc)
dsc_max_bpc = min_t(u8, dsc_max_bpc, max_req_bpc);
- num_bpc = drm_dp_dsc_sink_supported_input_bpcs(intel_dp->dsc_dpcd,
+ num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd,
dsc_bpc);
for (i = 0; i < num_bpc; i++) {
if (dsc_max_bpc >= dsc_bpc[i])
@@ -2056,6 +2057,8 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
struct link_config_limits *limits)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ struct intel_connector *connector =
+ to_intel_connector(conn_state->connector);
int pipe_bpp, forced_bpp;
int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp;
int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp;
@@ -2068,7 +2071,7 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
int max_bpc = min(limits->pipe.max_bpp / 3, (int)conn_state->max_requested_bpc);
/* For eDP use max bpp that can be supported with DSC. */
- pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp, max_bpc);
+ pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, max_bpc);
if (!is_dsc_pipe_bpp_sufficient(i915, conn_state, limits, pipe_bpp)) {
drm_dbg_kms(&i915->drm,
"Computed BPC is not in DSC BPC limits\n");
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index bd9cb9680b4c..af87aa2a5ed6 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -116,7 +116,8 @@ void intel_read_dp_sdp(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
unsigned int type);
bool intel_digital_port_connected(struct intel_encoder *encoder);
-int intel_dp_dsc_compute_max_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc);
+int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector,
+ u8 dsc_max_bpc);
u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
u32 link_clock, u32 lane_count,
u32 mode_clock, u32 mode_hdisplay,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index e01f669d2c8a..3ff429c30f30 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1003,7 +1003,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
* TBD pass the connector BPC,
* for now U8_MAX so that max BPC on that platform would be picked
*/
- int pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp, U8_MAX);
+ int pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_connector, U8_MAX);
if (drm_dp_sink_supports_fec(intel_dp->fec_capable)) {
dsc_max_compressed_bpp =
--
2.43.0