Blob Blame History Raw
From: Tom St Denis <tom.stdenis@amd.com>
Date: Tue, 16 May 2017 10:22:02 -0400
Subject: drm/amd/display: Make dce120_tg_is_blanked() more legible
Git-commit: 7b7d68659e3007a30d04d51e1c8bbd1fa8b6de3e
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c |   17 ++++------
 1 file changed, 8 insertions(+), 9 deletions(-)

--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
@@ -746,15 +746,14 @@ bool dce120_tg_is_blanked(struct timing_
 			mmCRTC0_CRTC_BLANK_CONTROL,
 			tg110->offsets.crtc);
 
-	if (
-		get_reg_field_value(
-			value,
-			CRTC0_CRTC_BLANK_CONTROL,
-			CRTC_BLANK_DATA_EN) == 1	&&
-		get_reg_field_value(
-			value,
-			CRTC0_CRTC_BLANK_CONTROL,
-			CRTC_CURRENT_BLANK_STATE) == 1)
+	if (get_reg_field_value(
+		value,
+		CRTC0_CRTC_BLANK_CONTROL,
+		CRTC_BLANK_DATA_EN) == 1 &&
+	    get_reg_field_value(
+		value,
+		CRTC0_CRTC_BLANK_CONTROL,
+		CRTC_CURRENT_BLANK_STATE) == 1)
 			return true;
 
 	return false;