From: Vikrant Mhaske <Vikrant.Mhaske@amd.com>
Date: Thu, 27 Jul 2017 17:30:52 +0800
Subject: drm/amd/display: Fix DCN compile errors
Git-commit: 49baf95740b4f233ea286ebbe7c1066c03f5dd3b
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
Fix for DCN compiler errors caused due to various submits
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 ++
1 file changed, 2 insertions(+)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -1475,6 +1475,8 @@ static void dcn10_pipe_control_lock(
struct pipe_ctx *pipe,
bool lock)
{
+ struct mem_input *mi = NULL;
+ mi = dc->res_pool->mis[pipe->pipe_idx];
/* use TG master update lock to lock everything on the TG
* therefore only top pipe need to lock
*/