From: Roman Li <Roman.Li@amd.com>
Date: Thu, 27 Jul 2017 19:53:55 -0400
Subject: drm/amd/display: Initial prototype of FBC implementation
Git-commit: a32e24b486e80417e62d34f60d625783affff431
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

- Protected by ENABLE_FBC compile flag
- DC part will follow

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   29 ++++++++++++++++++++++
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |   12 +++++++++
 2 files changed, 41 insertions(+)

--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -297,6 +297,30 @@ static void hotplug_notify_work_func(str
 	drm_kms_helper_hotplug_event(dev);
 }
 
+#ifdef ENABLE_FBC
+#include "dal_asic_id.h"
+/* Allocate memory for FBC compressed data  */
+/* TODO: Dynamic allocation */
+#define AMDGPU_FBC_SIZE    (3840 * 2160 * 4)
+
+void amdgpu_dm_initialize_fbc(struct amdgpu_device *adev)
+{
+	int r;
+	struct dm_comressor_info *compressor = &adev->dm.compressor;
+
+	if (!compressor->bo_ptr) {
+		r = amdgpu_bo_create_kernel(adev, AMDGPU_FBC_SIZE, PAGE_SIZE,
+				AMDGPU_GEM_DOMAIN_VRAM, &compressor->bo_ptr,
+				&compressor->gpu_addr, &compressor->cpu_addr);
+
+		if (r)
+			DRM_ERROR("DM: Failed to initialize fbc\n");
+	}
+
+}
+#endif
+
+
 /* Init display KMS
  *
  * Returns 0 on success
@@ -347,6 +371,11 @@ int amdgpu_dm_init(struct amdgpu_device
 
 	init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
 
+#ifdef ENABLE_FBC
+	if (adev->family == FAMILY_CZ)
+		amdgpu_dm_initialize_fbc(adev);
+	init_data.fbc_gpu_addr = adev->dm.compressor.gpu_addr;
+#endif
 	/* Display Core create. */
 	adev->dm.dc = dc_create(&init_data);
 
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -72,6 +72,15 @@ struct irq_list_head {
 	struct work_struct work;
 };
 
+#ifdef ENABLE_FBC
+struct dm_comressor_info {
+	void *cpu_addr;
+	struct amdgpu_bo *bo_ptr;
+	uint64_t gpu_addr;
+};
+#endif
+
+
 struct amdgpu_display_manager {
 	struct dal *dal;
 	struct dc *dc;
@@ -133,6 +142,9 @@ struct amdgpu_display_manager {
 	 * Caches device atomic state for suspend/resume
 	 */
 	struct drm_atomic_state *cached_state;
+#ifdef ENABLE_FBC
+	struct dm_comressor_info compressor;
+#endif
 };
 
 /* basic init/fini API */