Blob Blame History Raw
From: Harry Wentland <harry.wentland@amd.com>
Date: Tue, 8 Aug 2017 11:35:10 -0400
Subject: drm/amd/display: Fix regression in dce110_apply_ctx_for_surfaces
Git-commit: a2607aef3d0210859d4e9cae6bba7e134ec720d8
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

Caused by "add programming for 0 plane case" which was tested on DCN but
not on DCE.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -2639,7 +2639,7 @@ static void dce110_apply_ctx_for_surface
 	for (i = 0; i < dc->res_pool->pipe_count; i++) {
 		struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
 
-		if (pipe_ctx->stream == stream)
+		if (pipe_ctx->stream != stream)
 			continue;
 
 		dce110_program_front_end_for_pipe(dc, pipe_ctx);