From: Charlene Liu <charlene.liu@amd.com>
Date: Mon, 2 Oct 2017 16:25:58 -0400
Subject: drm/amd/display: Add debug flag for VSR support
Git-commit: f6cb588a42a7812e65eff368d3d1134ee1a88489
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/display/dc/dc.h                           |    1 +
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c         |    1 +
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c |    1 +
 3 files changed, 3 insertions(+)

--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -218,6 +218,7 @@ struct dc_debug {
 	bool disable_hbup_pg;
 	bool disable_dpp_pg;
 	bool stereo_support;
+	bool vsr_support;
 };
 struct dc_state;
 struct resource_pool;
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -428,6 +428,7 @@ static const struct dc_debug debug_defau
 		.pipe_split_policy = MPC_SPLIT_AVOID_MULT_DISP,
 		.disable_dcc = DCC_ENABLE,
 		.voltage_align_fclk = true,
+		.vsr_support = true,
 };
 
 static const struct dc_debug debug_defaults_diags = {
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c
@@ -25,6 +25,7 @@
 
 #include "reg_helper.h"
 #include "dcn10_timing_generator.h"
+#include "dc.h"
 
 #define REG(reg)\
 	tgn10->tg_regs->reg