From: Dave Airlie <airlied@redhat.com>
Date: Tue, 9 Jan 2018 13:43:03 +1000
Subject: drm/radeon: fill in rb backend map on evergreen/ni.
Git-commit: 8159e509203c50d0684483b4311b20e5d40553e8
Patch-mainline: v4.16-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
This looks to have never gotten filled in, and it seems to
trigger a bug in mesa.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reported-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/radeon/evergreen.c | 1 +
drivers/gpu/drm/radeon/ni.c | 1 +
2 files changed, 2 insertions(+)
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3513,6 +3513,7 @@ static void evergreen_gpu_init(struct ra
tmp = r6xx_remap_render_backend(rdev, tmp, rdev->config.evergreen.max_backends,
EVERGREEN_MAX_BACKENDS, disabled_rb_mask);
}
+ rdev->config.evergreen.backend_map = tmp;
WREG32(GB_BACKEND_MAP, tmp);
WREG32(CGTS_SYS_TCC_DISABLE, 0);
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1148,6 +1148,7 @@ static void cayman_gpu_init(struct radeo
rdev->config.cayman.max_shader_engines,
CAYMAN_MAX_BACKENDS, disabled_rb_mask);
}
+ rdev->config.cayman.backend_map = tmp;
WREG32(GB_BACKEND_MAP, tmp);
cgts_tcc_disable = 0xffff0000;