From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Date: Sun, 11 Feb 2018 15:07:34 +0200
Subject: drm: omapdrm: Use unsigned int type
Git-commit: d11e5c827a4dbbb4174087669e3c7d231570985b
Patch-mainline: v4.17-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
The kernel favours 'unsigned int' over plain 'unsigned'. Replace all
occurences of the latter by the former. This avoid lots of checkpatch
complaints in patches that touch lines where a plain 'unsigned' is used.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 8 -
drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c | 6
drivers/gpu/drm/omapdrm/dss/dispc.c | 25 +---
drivers/gpu/drm/omapdrm/dss/dpi.c | 2
drivers/gpu/drm/omapdrm/dss/dsi.c | 98 ++++++++--------
drivers/gpu/drm/omapdrm/dss/dss.c | 12 -
drivers/gpu/drm/omapdrm/dss/dss.h | 12 -
drivers/gpu/drm/omapdrm/dss/hdmi4.c | 2
drivers/gpu/drm/omapdrm/dss/hdmi5.c | 2
drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | 24 +--
drivers/gpu/drm/omapdrm/dss/hdmi_phy.c | 2
drivers/gpu/drm/omapdrm/dss/hdmi_wp.c | 2
drivers/gpu/drm/omapdrm/dss/omapdss.h | 4
drivers/gpu/drm/omapdrm/dss/pll.c | 4
14 files changed, 102 insertions(+), 101 deletions(-)
--- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
@@ -86,7 +86,7 @@ struct panel_drv_data {
struct workqueue_struct *workqueue;
bool ulps_enabled;
- unsigned ulps_timeout;
+ unsigned int ulps_timeout;
struct delayed_work ulps_work;
};
@@ -513,7 +513,7 @@ static ssize_t dsicm_show_ulps(struct de
{
struct platform_device *pdev = to_platform_device(dev);
struct panel_drv_data *ddata = platform_get_drvdata(pdev);
- unsigned t;
+ unsigned int t;
mutex_lock(&ddata->lock);
t = ddata->ulps_enabled;
@@ -560,7 +560,7 @@ static ssize_t dsicm_show_ulps_timeout(s
{
struct platform_device *pdev = to_platform_device(dev);
struct panel_drv_data *ddata = platform_get_drvdata(pdev);
- unsigned t;
+ unsigned int t;
mutex_lock(&ddata->lock);
t = ddata->ulps_timeout;
@@ -1064,7 +1064,7 @@ static int dsicm_memory_read(struct omap
int r;
int first = 1;
int plen;
- unsigned buf_used = 0;
+ unsigned int buf_used = 0;
if (size < w * h * 3)
return -ENOMEM;
--- a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
+++ b/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
@@ -289,7 +289,7 @@ static void enable_backlight_ctrl(struct
acx565akm_write(ddata, MIPID_CMD_WRITE_CTRL_DISP, (u8 *)&ctrl, 2);
}
-static void set_cabc_mode(struct panel_drv_data *ddata, unsigned mode)
+static void set_cabc_mode(struct panel_drv_data *ddata, unsigned int mode)
{
u16 cabc_ctrl;
@@ -303,12 +303,12 @@ static void set_cabc_mode(struct panel_d
acx565akm_write(ddata, MIPID_CMD_WRITE_CABC, (u8 *)&cabc_ctrl, 2);
}
-static unsigned get_cabc_mode(struct panel_drv_data *ddata)
+static unsigned int get_cabc_mode(struct panel_drv_data *ddata)
{
return ddata->cabc_mode;
}
-static unsigned get_hw_cabc_mode(struct panel_drv_data *ddata)
+static unsigned int get_hw_cabc_mode(struct panel_drv_data *ddata)
{
u8 cabc_ctrl;
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -969,7 +969,7 @@ static void dispc_ovl_set_pre_mult_alpha
static void dispc_ovl_setup_global_alpha(enum omap_plane_id plane,
enum omap_overlay_caps caps, u8 global_alpha)
{
- static const unsigned shifts[] = { 0, 8, 16, 24, };
+ static const unsigned int shifts[] = { 0, 8, 16, 24, };
int shift;
if ((caps & OMAP_DSS_OVL_CAP_GLOBAL_ALPHA) == 0)
@@ -1197,7 +1197,7 @@ void dispc_wb_set_channel_in(enum dss_wr
static void dispc_ovl_set_burst_size(enum omap_plane_id plane,
enum omap_burst_size burst_size)
{
- static const unsigned shifts[] = { 6, 14, 14, 14, 14, };
+ static const unsigned int shifts[] = { 6, 14, 14, 14, 14, };
int shift;
shift = shifts[plane];
@@ -1285,7 +1285,7 @@ static void dispc_ovl_set_vid_color_conv
static void dispc_ovl_enable_replication(enum omap_plane_id plane,
enum omap_overlay_caps caps, bool enable)
{
- static const unsigned shifts[] = { 5, 10, 10, 10 };
+ static const unsigned int shifts[] = { 5, 10, 10, 10 };
int shift;
if ((caps & OMAP_DSS_OVL_CAP_REPLICATION) == 0)
@@ -1450,9 +1450,8 @@ void dispc_ovl_compute_fifo_thresholds(e
* All sizes are in bytes. Both the buffer and burst are made of
* buffer_units, and the fifo thresholds must be buffer_unit aligned.
*/
-
- unsigned buf_unit = dispc.feat->buffer_size_unit;
- unsigned ovl_fifo_size, total_fifo_size, burst_size;
+ unsigned int buf_unit = dispc.feat->buffer_size_unit;
+ unsigned int ovl_fifo_size, total_fifo_size, burst_size;
int i;
burst_size = dispc_ovl_get_burst_size(plane);
@@ -2006,8 +2005,8 @@ static s32 pixinc(int pixels, u8 ps)
}
static void calc_offset(u16 screen_width, u16 width,
- u32 fourcc, bool fieldmode,
- unsigned int field_offset, unsigned *offset0, unsigned *offset1,
+ u32 fourcc, bool fieldmode, unsigned int field_offset,
+ unsigned int *offset0, unsigned int *offset1,
s32 *row_inc, s32 *pix_inc, int x_predecim, int y_predecim,
enum omap_dss_rotation_type rotation_type, u8 rotation)
{
@@ -2477,7 +2476,7 @@ static int dispc_ovl_setup_common(enum o
bool five_taps = true;
bool fieldmode = false;
int r, cconv = 0;
- unsigned offset0, offset1;
+ unsigned int offset0, offset1;
s32 row_inc;
s32 pix_inc;
u16 frame_width, frame_height;
@@ -3040,7 +3039,7 @@ static int vm_flag_to_int(enum display_f
static void dispc_mgr_set_timings(enum omap_channel channel,
const struct videomode *vm)
{
- unsigned xtot, ytot;
+ unsigned int xtot, ytot;
unsigned long ht, vt;
struct videomode t = *vm;
@@ -3119,7 +3118,7 @@ static unsigned long dispc_fclk_rate(voi
r = dss_get_dispc_clk_rate();
} else {
struct dss_pll *pll;
- unsigned clkout_idx;
+ unsigned int clkout_idx;
pll = dss_pll_find_by_src(src);
clkout_idx = dss_pll_get_clkout_idx_for_src(src);
@@ -3146,7 +3145,7 @@ static unsigned long dispc_mgr_lclk_rate
r = dss_get_dispc_clk_rate();
} else {
struct dss_pll *pll;
- unsigned clkout_idx;
+ unsigned int clkout_idx;
pll = dss_pll_find_by_src(src);
clkout_idx = dss_pll_get_clkout_idx_for_src(src);
@@ -3487,7 +3486,7 @@ bool dispc_div_calc(unsigned long dispc_
unsigned long pck, lck;
unsigned long lck_max;
unsigned long pckd_hw_min, pckd_hw_max;
- unsigned min_fck_per_pck;
+ unsigned int min_fck_per_pck;
unsigned long fck;
#ifdef CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK
--- a/drivers/gpu/drm/omapdrm/dss/dpi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dpi.c
@@ -141,7 +141,7 @@ static enum dss_clk_source dpi_get_clk_s
struct dpi_clk_calc_ctx {
struct dss_pll *pll;
- unsigned clkout_idx;
+ unsigned int clkout_idx;
/* inputs */
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -269,10 +269,10 @@ enum dsi_vc_source {
struct dsi_irq_stats {
unsigned long last_reset;
- unsigned irq_count;
- unsigned dsi_irqs[32];
- unsigned vc_irqs[4][32];
- unsigned cio_irqs[32];
+ unsigned int irq_count;
+ unsigned int dsi_irqs[32];
+ unsigned int vc_irqs[4][32];
+ unsigned int cio_irqs[32];
};
struct dsi_isr_tables {
@@ -373,7 +373,7 @@ struct dsi_data {
int update_channel;
#ifdef DSI_PERF_MEASURE
- unsigned update_bytes;
+ unsigned int update_bytes;
#endif
bool te_enabled;
@@ -406,13 +406,13 @@ struct dsi_data {
struct dsi_irq_stats irq_stats;
#endif
- unsigned num_lanes_supported;
- unsigned line_buffer_size;
+ unsigned int num_lanes_supported;
+ unsigned int line_buffer_size;
struct dsi_lane_config lanes[DSI_MAX_NR_LANES];
- unsigned num_lanes_used;
+ unsigned int num_lanes_used;
- unsigned scp_clk_refcount;
+ unsigned int scp_clk_refcount;
struct dss_lcd_mgr_config mgr_config;
struct videomode vm;
@@ -782,7 +782,7 @@ static void dsi_handle_irq_errors(struct
}
static void dsi_call_isrs(struct dsi_isr_data *isr_array,
- unsigned isr_array_size, u32 irqstatus)
+ unsigned int isr_array_size, u32 irqstatus)
{
struct dsi_isr_data *isr_data;
int i;
@@ -891,7 +891,7 @@ static irqreturn_t omap_dsi_irq_handler(
/* dsi->irq_lock has to be locked by the caller */
static void _omap_dsi_configure_irqs(struct platform_device *dsidev,
struct dsi_isr_data *isr_array,
- unsigned isr_array_size, u32 default_mask,
+ unsigned int isr_array_size, u32 default_mask,
const struct dsi_reg enable_reg,
const struct dsi_reg status_reg)
{
@@ -975,7 +975,7 @@ static void _dsi_initialize_irq(struct p
}
static int _dsi_register_isr(omap_dsi_isr_t isr, void *arg, u32 mask,
- struct dsi_isr_data *isr_array, unsigned isr_array_size)
+ struct dsi_isr_data *isr_array, unsigned int isr_array_size)
{
struct dsi_isr_data *isr_data;
int free_idx;
@@ -1009,7 +1009,7 @@ static int _dsi_register_isr(omap_dsi_is
}
static int _dsi_unregister_isr(omap_dsi_isr_t isr, void *arg, u32 mask,
- struct dsi_isr_data *isr_array, unsigned isr_array_size)
+ struct dsi_isr_data *isr_array, unsigned int isr_array_size)
{
struct dsi_isr_data *isr_data;
int i;
@@ -1301,7 +1301,7 @@ static int dsi_lp_clock_calc(unsigned lo
unsigned long lp_clk_min, unsigned long lp_clk_max,
struct dsi_lp_clock_info *lp_cinfo)
{
- unsigned lp_clk_div;
+ unsigned int lp_clk_div;
unsigned long lp_clk;
lp_clk_div = DIV_ROUND_UP(dsi_fclk, lp_clk_max * 2);
@@ -1320,9 +1320,9 @@ static int dsi_set_lp_clk_divisor(struct
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
unsigned long dsi_fclk;
- unsigned lp_clk_div;
+ unsigned int lp_clk_div;
unsigned long lp_clk;
- unsigned lpdiv_max = dsi->data->max_pll_lpdiv;
+ unsigned int lpdiv_max = dsi->data->max_pll_lpdiv;
lp_clk_div = dsi->user_lp_cinfo.lp_clk_div;
@@ -1798,7 +1798,7 @@ static int dsi_cio_power(struct platform
return 0;
}
-static unsigned dsi_get_line_buf_size(struct platform_device *dsidev)
+static unsigned int dsi_get_line_buf_size(struct platform_device *dsidev)
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
int val;
@@ -1850,9 +1850,9 @@ static int dsi_set_lane_config(struct pl
r = dsi_read_reg(dsidev, DSI_COMPLEXIO_CFG1);
for (i = 0; i < dsi->num_lanes_used; ++i) {
- unsigned offset = offsets[i];
- unsigned polarity, lane_number;
- unsigned t;
+ unsigned int offset = offsets[i];
+ unsigned int polarity, lane_number;
+ unsigned int t;
for (t = 0; t < dsi->num_lanes_supported; ++t)
if (dsi->lanes[t].function == functions[i])
@@ -1870,7 +1870,7 @@ static int dsi_set_lane_config(struct pl
/* clear the unused lanes */
for (; i < dsi->num_lanes_supported; ++i) {
- unsigned offset = offsets[i];
+ unsigned int offset = offsets[i];
r = FLD_MOD(r, 0, offset + 2, offset);
r = FLD_MOD(r, 0, offset + 3, offset + 3);
@@ -1881,7 +1881,8 @@ static int dsi_set_lane_config(struct pl
return 0;
}
-static inline unsigned ns2ddr(struct platform_device *dsidev, unsigned ns)
+static inline unsigned int ns2ddr(struct platform_device *dsidev,
+ unsigned int ns)
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
@@ -1890,7 +1891,8 @@ static inline unsigned ns2ddr(struct pla
return (ns * (ddr_clk / 1000 / 1000) + 999) / 1000;
}
-static inline unsigned ddr2ns(struct platform_device *dsidev, unsigned ddr)
+static inline unsigned int ddr2ns(struct platform_device *dsidev,
+ unsigned int ddr)
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
@@ -1978,7 +1980,7 @@ static void dsi_cio_timings(struct platf
/* lane masks have lane 0 at lsb. mask_p for positive lines, n for negative */
static void dsi_cio_enable_lane_override(struct platform_device *dsidev,
- unsigned mask_p, unsigned mask_n)
+ unsigned int mask_p, unsigned int mask_n)
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
int i;
@@ -1988,7 +1990,7 @@ static void dsi_cio_enable_lane_override
l = 0;
for (i = 0; i < dsi->num_lanes_supported; ++i) {
- unsigned p = dsi->lanes[i].polarity;
+ unsigned int p = dsi->lanes[i].polarity;
if (mask_p & (1 << i))
l |= 1 << (i * 2 + (p ? 0 : 1));
@@ -2075,10 +2077,10 @@ static int dsi_cio_wait_tx_clk_esc_reset
}
/* return bitmask of enabled lanes, lane0 being the lsb */
-static unsigned dsi_get_lane_mask(struct platform_device *dsidev)
+static unsigned int dsi_get_lane_mask(struct platform_device *dsidev)
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
- unsigned mask = 0;
+ unsigned int mask = 0;
int i;
for (i = 0; i < dsi->num_lanes_supported; ++i) {
@@ -2204,7 +2206,7 @@ static int dsi_cio_init(struct platform_
dsi_write_reg(dsidev, DSI_TIMING1, l);
if (dsi->ulps_enabled) {
- unsigned mask_p;
+ unsigned int mask_p;
int i;
DSSDBG("manual ulps exit\n");
@@ -3223,7 +3225,7 @@ static int dsi_enter_ulps(struct platfor
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
DECLARE_COMPLETION_ONSTACK(completion);
int r, i;
- unsigned mask;
+ unsigned int mask;
DSSDBG("Entering ULPS");
@@ -3313,7 +3315,7 @@ err:
}
static void dsi_set_lp_rx_timeout(struct platform_device *dsidev,
- unsigned ticks, bool x4, bool x16)
+ unsigned int ticks, bool x4, bool x16)
{
unsigned long fck;
unsigned long total_ticks;
@@ -3339,8 +3341,8 @@ static void dsi_set_lp_rx_timeout(struct
(total_ticks * 1000) / (fck / 1000 / 1000));
}
-static void dsi_set_ta_timeout(struct platform_device *dsidev, unsigned ticks,
- bool x8, bool x16)
+static void dsi_set_ta_timeout(struct platform_device *dsidev,
+ unsigned int ticks, bool x8, bool x16)
{
unsigned long fck;
unsigned long total_ticks;
@@ -3367,7 +3369,7 @@ static void dsi_set_ta_timeout(struct pl
}
static void dsi_set_stop_state_counter(struct platform_device *dsidev,
- unsigned ticks, bool x4, bool x16)
+ unsigned int ticks, bool x4, bool x16)
{
unsigned long fck;
unsigned long total_ticks;
@@ -3394,7 +3396,7 @@ static void dsi_set_stop_state_counter(s
}
static void dsi_set_hs_tx_timeout(struct platform_device *dsidev,
- unsigned ticks, bool x4, bool x16)
+ unsigned int ticks, bool x4, bool x16)
{
unsigned long fck;
unsigned long total_ticks;
@@ -3740,13 +3742,13 @@ static int dsi_proto_config(struct platf
static void dsi_proto_timings(struct platform_device *dsidev)
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
- unsigned tlpx, tclk_zero, tclk_prepare, tclk_trail;
- unsigned tclk_pre, tclk_post;
- unsigned ths_prepare, ths_prepare_ths_zero, ths_zero;
- unsigned ths_trail, ths_exit;
- unsigned ddr_clk_pre, ddr_clk_post;
- unsigned enter_hs_mode_lat, exit_hs_mode_lat;
- unsigned ths_eot;
+ unsigned int tlpx, tclk_zero, tclk_prepare, tclk_trail;
+ unsigned int tclk_pre, tclk_post;
+ unsigned int ths_prepare, ths_prepare_ths_zero, ths_zero;
+ unsigned int ths_trail, ths_exit;
+ unsigned int ddr_clk_pre, ddr_clk_post;
+ unsigned int enter_hs_mode_lat, exit_hs_mode_lat;
+ unsigned int ths_eot;
int ndl = dsi->num_lanes_used - 1;
u32 r;
@@ -4014,16 +4016,16 @@ static void dsi_update_screen_dispc(stru
{
struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
enum omap_channel dispc_channel = dsi->output.dispc_channel;
- unsigned bytespp;
- unsigned bytespl;
- unsigned bytespf;
- unsigned total_len;
- unsigned packet_payload;
- unsigned packet_len;
+ unsigned int bytespp;
+ unsigned int bytespl;
+ unsigned int bytespf;
+ unsigned int total_len;
+ unsigned int packet_payload;
+ unsigned int packet_len;
u32 l;
int r;
const unsigned channel = dsi->update_channel;
- const unsigned line_buf_size = dsi->line_buffer_size;
+ const unsigned int line_buf_size = dsi->line_buffer_size;
u16 w = dsi->vm.hactive;
u16 h = dsi->vm.vactive;
--- a/drivers/gpu/drm/omapdrm/dss/dss.c
+++ b/drivers/gpu/drm/omapdrm/dss/dss.c
@@ -181,8 +181,8 @@ static void dss_restore_context(void)
void dss_ctrl_pll_enable(enum dss_pll_id pll_id, bool enable)
{
- unsigned shift;
- unsigned val;
+ unsigned int shift;
+ unsigned int val;
if (!dss.syscon_pll_ctrl)
return;
@@ -211,7 +211,7 @@ void dss_ctrl_pll_enable(enum dss_pll_id
static int dss_ctrl_pll_set_control_mux(enum dss_clk_source clk_src,
enum omap_channel channel)
{
- unsigned shift, val;
+ unsigned int shift, val;
if (!dss.syscon_pll_ctrl)
return -EINVAL;
@@ -620,12 +620,12 @@ bool dss_div_calc(unsigned long pck, uns
unsigned long fck_hw_max;
unsigned long fckd_hw_max;
unsigned long prate;
- unsigned m;
+ unsigned int m;
fck_hw_max = dss.feat->fck_freq_max;
if (dss.parent_clk == NULL) {
- unsigned pckd;
+ unsigned int pckd;
pckd = fck_hw_max / pck;
@@ -694,7 +694,7 @@ static int dss_setup_default_clock(void)
{
unsigned long max_dss_fck, prate;
unsigned long fck;
- unsigned fck_div;
+ unsigned int fck_div;
int r;
max_dss_fck = dss.feat->fck_freq_max;
--- a/drivers/gpu/drm/omapdrm/dss/dss.h
+++ b/drivers/gpu/drm/omapdrm/dss/dss.h
@@ -167,10 +167,10 @@ struct dss_pll_ops {
struct dss_pll_hw {
enum dss_pll_type type;
- unsigned n_max;
- unsigned m_min;
- unsigned m_max;
- unsigned mX_max;
+ unsigned int n_max;
+ unsigned int m_min;
+ unsigned int m_max;
+ unsigned int mX_max;
unsigned long fint_min, fint_max;
unsigned long clkdco_min, clkdco_low, clkdco_max;
@@ -390,7 +390,7 @@ int dispc_wb_setup(const struct omap_dss
bool mem_to_mem, const struct videomode *vm);
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
-static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)
+static inline void dss_collect_irq_stats(u32 irqstatus, unsigned int *irq_arr)
{
int b;
for (b = 0; b < 32; ++b) {
@@ -410,7 +410,7 @@ int dss_pll_register(struct dss_pll *pll
void dss_pll_unregister(struct dss_pll *pll);
struct dss_pll *dss_pll_find(const char *name);
struct dss_pll *dss_pll_find_by_src(enum dss_clk_source src);
-unsigned dss_pll_get_clkout_idx_for_src(enum dss_clk_source src);
+unsigned int dss_pll_get_clkout_idx_for_src(enum dss_clk_source src);
int dss_pll_enable(struct dss_pll *pll);
void dss_pll_disable(struct dss_pll *pll);
int dss_pll_set_config(struct dss_pll *pll,
--- a/drivers/gpu/drm/omapdrm/dss/hdmi4.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi4.c
@@ -180,7 +180,7 @@ static int hdmi_power_on_full(struct oma
enum omap_channel channel = dssdev->dispc_channel;
struct hdmi_wp_data *wp = &hdmi.wp;
struct dss_pll_clock_info hdmi_cinfo = { 0 };
- unsigned pc;
+ unsigned int pc;
r = hdmi_power_on_core(dssdev);
if (r)
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5.c
@@ -175,7 +175,7 @@ static int hdmi_power_on_full(struct oma
struct videomode *vm;
enum omap_channel channel = dssdev->dispc_channel;
struct dss_pll_clock_info hdmi_cinfo = { 0 };
- unsigned pc;
+ unsigned int pc;
r = hdmi_power_on_core(dssdev);
if (r)
--- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
@@ -50,14 +50,14 @@ static void hdmi_core_ddc_init(struct hd
{
void __iomem *base = core->base;
const unsigned long long iclk = 266000000; /* DSS L3 ICLK */
- const unsigned ss_scl_high = 4600; /* ns */
- const unsigned ss_scl_low = 5400; /* ns */
- const unsigned fs_scl_high = 600; /* ns */
- const unsigned fs_scl_low = 1300; /* ns */
- const unsigned sda_hold = 1000; /* ns */
- const unsigned sfr_div = 10;
+ const unsigned int ss_scl_high = 4600; /* ns */
+ const unsigned int ss_scl_low = 5400; /* ns */
+ const unsigned int fs_scl_high = 600; /* ns */
+ const unsigned int fs_scl_low = 1300; /* ns */
+ const unsigned int sda_hold = 1000; /* ns */
+ const unsigned int sfr_div = 10;
unsigned long long sfr;
- unsigned v;
+ unsigned int v;
sfr = iclk / sfr_div; /* SFR_DIV */
sfr /= 1000; /* SFR clock in kHz */
@@ -430,11 +430,11 @@ static void hdmi_core_write_avi_infofram
void __iomem *base = core->base;
u8 data[HDMI_INFOFRAME_SIZE(AVI)];
u8 *ptr;
- unsigned y, a, b, s;
- unsigned c, m, r;
- unsigned itc, ec, q, sc;
- unsigned vic;
- unsigned yq, cn, pr;
+ unsigned int y, a, b, s;
+ unsigned int c, m, r;
+ unsigned int itc, ec, q, sc;
+ unsigned int vic;
+ unsigned int yq, cn, pr;
hdmi_avi_infoframe_pack(frame, data, sizeof(data));
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_phy.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_phy.c
@@ -99,7 +99,7 @@ static void hdmi_phy_configure_lanes(str
u16 lane_cfg = 0;
int i;
- unsigned lane_cfg_val;
+ unsigned int lane_cfg_val;
u16 pol_val = 0;
for (i = 0; i < 4; ++i)
--- a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
+++ b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
@@ -168,7 +168,7 @@ void hdmi_wp_video_config_timing(struct
{
u32 timing_h = 0;
u32 timing_v = 0;
- unsigned hsync_len_offset = 1;
+ unsigned int hsync_len_offset = 1;
DSSDBG("Enter hdmi_wp_video_config_timing\n");
--- a/drivers/gpu/drm/omapdrm/dss/omapdss.h
+++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h
@@ -198,8 +198,8 @@ enum omap_dss_dsi_trans_mode {
struct omap_dss_dsi_videomode_timings {
unsigned long hsclk;
- unsigned ndl;
- unsigned bitspp;
+ unsigned int ndl;
+ unsigned int bitspp;
/* pixels */
u16 hact;
--- a/drivers/gpu/drm/omapdrm/dss/pll.c
+++ b/drivers/gpu/drm/omapdrm/dss/pll.c
@@ -105,7 +105,7 @@ struct dss_pll *dss_pll_find_by_src(enum
}
}
-unsigned dss_pll_get_clkout_idx_for_src(enum dss_clk_source src)
+unsigned int dss_pll_get_clkout_idx_for_src(enum dss_clk_source src)
{
switch (src) {
case DSS_CLK_SRC_HDMI_PLL:
@@ -277,7 +277,7 @@ bool dss_pll_calc_b(const struct dss_pll
unsigned long fint, clkdco, clkout;
unsigned long target_clkdco;
unsigned long min_dco;
- unsigned n, m, mf, m2, sd;
+ unsigned int n, m, mf, m2, sd;
const struct dss_pll_hw *hw = pll->hw;
DSSDBG("clkin %lu, target clkout %lu\n", clkin, target_clkout);