From: Ben Skeggs <bskeggs@redhat.com>
Date: Tue, 8 May 2018 20:39:46 +1000
Subject: drm/nouveau/gr/gf100-: virtualise init_504430
Git-commit: ab4d49a349653dcd902be8974c4f7927cd49b11d
Patch-mainline: v4.18-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c | 2 ++
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h | 3 +++
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c | 10 +++++++++-
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c | 3 ++-
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c | 3 ++-
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c | 1 +
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.c | 1 +
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.c | 1 +
8 files changed, 21 insertions(+), 3 deletions(-)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
@@ -2092,6 +2092,8 @@ gf100_gr_init(struct gf100_gr *gr)
if (gr->func->init_tex_hww_esr)
gr->func->init_tex_hww_esr(gr, gpc, tpc);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
+ if (gr->func->init_504430)
+ gr->func->init_504430(gr, gpc, tpc);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f);
}
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
@@ -139,6 +139,7 @@ struct gf100_gr_func {
void (*init_419c9c)(struct gf100_gr *);
void (*init_ppc_exceptions)(struct gf100_gr *);
void (*init_tex_hww_esr)(struct gf100_gr *, int gpc, int tpc);
+ void (*init_504430)(struct gf100_gr *, int gpc, int tpc);
void (*set_hww_esr_report_mask)(struct gf100_gr *);
const struct gf100_gr_pack *mmio;
struct {
@@ -175,6 +176,8 @@ void gk104_gr_init_sked_hww_esr(struct g
void gk110_gr_init_419eb4(struct gf100_gr *);
+void gm107_gr_init_504430(struct gf100_gr *, int, int);
+
int gk20a_gr_init(struct gf100_gr *);
int gm200_gr_rops(struct gf100_gr *);
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
@@ -281,6 +281,13 @@ gm107_gr_pack_mmio[] = {
* PGRAPH engine/subdev functions
******************************************************************************/
+void
+gm107_gr_init_504430(struct gf100_gr *gr, int gpc, int tpc)
+{
+ struct nvkm_device *device = gr->base.engine.subdev.device;
+ nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
+}
+
static void
gm107_gr_init_bios_2(struct gf100_gr *gr)
{
@@ -395,7 +402,7 @@ gm107_gr_init(struct gf100_gr *gr)
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
gr->func->init_tex_hww_esr(gr, gpc, tpc);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
- nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
+ gr->func->init_504430(gr, gpc, tpc);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x00000005);
}
@@ -459,6 +466,7 @@ gm107_gr = {
.init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+ .init_504430 = gm107_gr_init_504430,
.mmio = gm107_gr_pack_mmio,
.fecs.ucode = &gm107_gr_fecs_ucode,
.gpccs.ucode = &gm107_gr_gpccs_ucode,
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c
@@ -123,7 +123,7 @@ gm200_gr_init(struct gf100_gr *gr)
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
gr->func->init_tex_hww_esr(gr, gpc, tpc);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
- nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
+ gr->func->init_504430(gr, gpc, tpc);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x00000005);
}
@@ -205,6 +205,7 @@ gm200_gr = {
.init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+ .init_504430 = gm107_gr_init_504430,
.rops = gm200_gr_rops,
.ppc_nr = 2,
.grctx = &gm200_grctx,
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c
@@ -103,7 +103,7 @@ gp100_gr_init(struct gf100_gr *gr)
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
gr->func->init_tex_hww_esr(gr, gpc, tpc);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
- nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
+ gr->func->init_504430(gr, gpc, gpc);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x00000105);
}
@@ -145,6 +145,7 @@ gp100_gr = {
.init_419c9c = gp100_gr_init_419c9c,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+ .init_504430 = gm107_gr_init_504430,
.rops = gm200_gr_rops,
.ppc_nr = 2,
.grctx = &gp100_grctx,
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c
@@ -55,6 +55,7 @@ gp102_gr = {
.init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+ .init_504430 = gm107_gr_init_504430,
.rops = gm200_gr_rops,
.ppc_nr = 3,
.grctx = &gp102_grctx,
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.c
@@ -41,6 +41,7 @@ gp107_gr = {
.init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+ .init_504430 = gm107_gr_init_504430,
.rops = gm200_gr_rops,
.ppc_nr = 1,
.grctx = &gp107_grctx,
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.c
@@ -39,6 +39,7 @@ gp10b_gr = {
.init_419cc0 = gf100_gr_init_419cc0,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+ .init_504430 = gm107_gr_init_504430,
.rops = gm200_gr_rops,
.ppc_nr = 1,
.grctx = &gp102_grctx,