From 120b56a2a7a262c0940299615c7bcf97d3982711 Mon Sep 17 00:00:00 2001
From: Imre Deak <imre.deak@intel.com>
Date: Tue, 11 Jul 2017 23:42:31 +0300
Subject: [PATCH] drm/i915/gen2: Add an ID for the display pipes power well
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Git-commit: 120b56a2a7a262c0940299615c7bcf97d3982711
Patch-mainline: v4.14-rc1
References: FATE#322643 bsc#1055900

Make the I830 power well ID assignment explicit for consistency.

V2: 
- s/GEN2/I830/ in the comment, since other GEN2s don't have the power
  well. (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170711204236.5618-2-imre.deak@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Takashi Iwai <tiwai@suse.de>

---
 drivers/gpu/drm/i915/i915_reg.h         |    6 ++++++
 drivers/gpu/drm/i915/intel_runtime_pm.c |    1 +
 2 files changed, 7 insertions(+)

--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1073,6 +1073,12 @@ static inline bool i915_mmio_reg_valid(i
  */
 enum i915_power_well_id {
 	/*
+	 * I830
+	 *  - custom power well
+	 */
+	I830_DISP_PW_PIPES = 0,
+
+	/*
 	 * VLV/CHV
 	 *  - PUNIT_REG_PWRGT_CTRL (bit: id*2),
 	 *    PUNIT_REG_PWRGT_STATUS (bit: id*2) (PUNIT HAS v0.8)
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -2036,6 +2036,7 @@ static struct i915_power_well i830_power
 		.name = "pipes",
 		.domains = I830_PIPES_POWER_DOMAINS,
 		.ops = &i830_pipes_power_well_ops,
+		.id = I830_DISP_PW_PIPES,
 	},
 };