From 178cd160c6652f57571ba3dc0a9091a1f41d9bc8 Mon Sep 17 00:00:00 2001
From: Changbin Du <changbin.du@intel.com>
Date: Tue, 6 Jun 2017 15:56:14 +0800
Subject: [PATCH] drm/i915/gvt: Tuning the size of MMIO hash lookup table to 2048
Git-commit: 178cd160c6652f57571ba3dc0a9091a1f41d9bc8
Patch-mainline: v4.13-rc1
References: FATE#322643 bsc#1055900

On Skylake platform, The traced virtual mmio registers are up to 2039.
So tuning the hash table size to improve lookup performance.

Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Acked-by: Takashi Iwai <tiwai@suse.de>

---
 drivers/gpu/drm/i915/gvt/gvt.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -195,7 +195,7 @@ struct intel_gvt_fence {
 	unsigned long vgpu_allocated_fence_num;
 };
 
-#define INTEL_GVT_MMIO_HASH_BITS 9
+#define INTEL_GVT_MMIO_HASH_BITS 11
 
 struct intel_gvt_mmio {
 	u8 *mmio_attribute;