From fb9248e202df17cf731c76305f6015bf409179ca Mon Sep 17 00:00:00 2001
From: Imre Deak <imre.deak@intel.com>
Date: Tue, 11 Jul 2017 23:42:32 +0300
Subject: [PATCH] drm/i915/hsw, bdw: Add an ID for the global display power well
Git-commit: fb9248e202df17cf731c76305f6015bf409179ca
Patch-mainline: v4.14-rc1
References: FATE#322643 bsc#1055900
Add an ID for the HSW/BDW global display power well for consistency. The
ID is selected so that it can be used to get at the HW request and
status flags with the corresponding GEN9+ macros. Unifying the HSW/BDW
and GEN9+ versions of these macros and the power well ops using them
will be done in follow-up patches.
V2:
- Rebased on v2 of patch 2.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170711204236.5618-3-imre.deak@intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Takashi Iwai <tiwai@suse.de>
---
drivers/gpu/drm/i915/i915_reg.h | 6 ++++++
drivers/gpu/drm/i915/intel_runtime_pm.c | 2 ++
2 files changed, 8 insertions(+)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1098,6 +1098,12 @@ enum i915_power_well_id {
CHV_DISP_PW_PIPE_A, /* 13 */
/*
+ * HSW/BDW
+ * - HSW_PWR_WELL_DRIVER (status bit: id*2, req bit: id*2+1)
+ */
+ HSW_DISP_PW_GLOBAL = 15,
+
+ /*
* GEN9+
* - HSW_PWR_WELL_DRIVER (status bit: id*2, req bit: id*2+1)
*/
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -2080,6 +2080,7 @@ static struct i915_power_well hsw_power_
.name = "display",
.domains = HSW_DISPLAY_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
+ .id = HSW_DISP_PW_GLOBAL,
},
};
@@ -2095,6 +2096,7 @@ static struct i915_power_well bdw_power_
.name = "display",
.domains = BDW_DISPLAY_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
+ .id = HSW_DISP_PW_GLOBAL,
},
};