Blob Blame History Raw
From: Leo Liu <leo.liu@amd.com>
Date: Tue, 21 Feb 2017 11:24:09 -0500
Subject: drm/amdgpu: get cs support for AMDGPU_HW_IP_VCN_ENC
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Git-commit: f93aa00c0bdc85ebd9ace72e34997cf4ba56e839
Patch-mainline: v4.13-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c |    9 +++++++++
 1 file changed, 9 insertions(+)

--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -94,6 +94,15 @@ int amdgpu_cs_get_ring(struct amdgpu_dev
 	case AMDGPU_HW_IP_VCN_DEC:
 		*out_ring = &adev->vcn.ring_dec;
 		break;
+	case AMDGPU_HW_IP_VCN_ENC:
+		if (ring < adev->vcn.num_enc_rings){
+			*out_ring = &adev->vcn.ring_enc[ring];
+		} else {
+			DRM_ERROR("only %d VCN ENC rings are supported\n",
+				adev->vcn.num_enc_rings);
+			return -EINVAL;
+		}
+		break;
 	}
 
 	if (!(*out_ring && (*out_ring)->adev)) {