From: Harry Wentland <harry.wentland@amd.com>
Date: Wed, 4 Jan 2017 18:48:07 -0500
Subject: drm/amd/display: Fix warnings in DC
Git-commit: e5cf325b0c21e626c402b57a055f02c478e3df40
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc_resource.c           |    9 ++++-----
 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c                |    6 ------
 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c |    1 -
 drivers/gpu/drm/amd/display/dc/dce110/dce110_ipp_gamma.c    |    2 --
 4 files changed, 4 insertions(+), 14 deletions(-)

--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -1731,14 +1731,15 @@ static void set_hdr_static_info_packet(
 		struct core_stream *stream,
 		struct hw_info_packet *info_packet)
 {
-	uint16_t i;
+	uint16_t i = 0;
 	enum signal_type signal = stream->signal;
+	struct dc_hdr_static_metadata hdr_metadata;
+	uint32_t data;
 
 	if (!surface)
 		return;
 
-	struct dc_hdr_static_metadata hdr_metadata =
-			surface->public.hdr_static_ctx;
+	hdr_metadata = surface->public.hdr_static_ctx;
 
 	if (dc_is_hdmi_signal(signal)) {
 		info_packet->valid = true;
@@ -1757,8 +1758,6 @@ static void set_hdr_static_info_packet(
 		i = 2;
 	}
 
-	uint32_t data;
-
 	data = hdr_metadata.is_hdr;
 	info_packet->sb[i++] = data ? 0x02 : 0x00;
 	info_packet->sb[i++] = 0x00;
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.c
@@ -119,7 +119,6 @@ static void regamma_config_regions_and_s
 	const struct pwl_params *params)
 {
 	const struct gamma_curve *curve;
-	uint32_t value = 0;
 
 	{
 		REG_SET_2(REGAMMA_CNTLA_START_CNTL, 0,
@@ -565,8 +564,6 @@ void dce110_opp_set_clamping(
 	struct dce110_opp *opp110,
 	const struct clamping_and_pixel_encoding_params *params)
 {
-	uint32_t clamp_cntl_value = 0;
-
 	REG_SET_2(FMT_CLAMP_CNTL, 0,
 		FMT_CLAMP_DATA_EN, 0,
 		FMT_CLAMP_COLOR_FORMAT, 0);
@@ -731,7 +728,6 @@ void dce110_opp_set_dyn_expansion(
 static void program_formatter_reset_dig_resync_fifo(struct output_pixel_processor *opp)
 {
 	struct dce110_opp *opp110 = TO_DCE110_OPP(opp);
-	uint8_t counter = 10;
 
 	/* clear previous phase lock status*/
 	REG_UPDATE(FMT_CONTROL,
@@ -810,8 +806,6 @@ static bool configure_graphics_mode(
 	enum graphics_csc_adjust_type csc_adjust_type,
 	enum dc_color_space color_space)
 {
-	struct dc_context *ctx = opp110->base.ctx;
-
 	REG_SET(OUTPUT_CSC_CONTROL, 0,
 		OUTPUT_CSC_GRPH_MODE, 0);
 
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -293,7 +293,6 @@ static bool dce110_set_output_transfer_f
 {
 	struct output_pixel_processor *opp = pipe_ctx->opp;
 	const struct core_gamma *ramp = NULL;
-	struct ipp_prescale_params prescale_params = { 0 };
 	struct pwl_params *regamma_params;
 	bool result = false;
 
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_ipp_gamma.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_ipp_gamma.c
@@ -72,8 +72,6 @@ bool dce110_ipp_set_degamma(
 {
 	struct dce110_ipp *ipp110 = TO_DCE110_IPP(ipp);
 
-	uint32_t value = 0;
-
 	uint32_t degamma_type = (mode == IPP_DEGAMMA_MODE_HW_sRGB) ? 1 : 0;
 
 	ASSERT(mode == IPP_DEGAMMA_MODE_BYPASS ||